patch-2.0.36 linux/drivers/scsi/aic7xxx_proc.c
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- Lines: 173
- Date:
Sun Nov 15 10:33:08 1998
- Orig file:
v2.0.35/linux/drivers/scsi/aic7xxx_proc.c
- Orig date:
Sun Nov 15 10:49:44 1998
diff -u --recursive --new-file v2.0.35/linux/drivers/scsi/aic7xxx_proc.c linux/drivers/scsi/aic7xxx_proc.c
@@ -85,10 +85,8 @@
struct aic7xxx_host *p;
int size = 0;
unsigned char i;
-#ifdef AIC7XXX_PROC_STATS
struct aic7xxx_xferstats *sp;
unsigned char target, lun;
-#endif
HBAptr = NULL;
@@ -130,16 +128,18 @@
*/
size = 4096;
-#ifdef AIC7XXX_PROC_STATS
for (target = 0; target < MAX_TARGETS; target++)
{
for (lun = 0; lun < MAX_LUNS; lun++)
{
if (p->stats[target][lun].xfers != 0)
+#ifdef AIC7XXX_PROC_STATS
size += 512;
+#else
+ size += 256;
+#endif
}
}
-#endif
if (aic7xxx_buffer_size != size)
{
if (aic7xxx_buffer != NULL)
@@ -195,9 +195,11 @@
if (p->flags & (AHC_CHNLB|AHC_CHNLC))
channel = (p->flags & AHC_CHNLB) ? " Channel B" : " Channel C";
}
- if (p->type & AHC_WIDE)
+ if (p->features & AHC_WIDE)
wide = "Wide ";
- if (p->type & AHC_ULTRA)
+ if (p->features & AHC_ULTRA2)
+ ultra = "Ultra2-LVD/SE ";
+ else if (p->features & AHC_ULTRA)
ultra = "Ultra ";
size += sprintf(BLS, " %s%sController%s\n",
ultra, wide, channel);
@@ -210,25 +212,26 @@
{
size += sprintf(BLS, " PCI MMAPed I/O Base: 0x%lx\n", p->mbase);
}
- if( !(p->type & AHC_AIC78x0) )
+ if( (p->chip & (AHC_VL | AHC_EISA)) )
{
size += sprintf(BLS, " BIOS Memory Address: 0x%08x\n", p->bios_address);
- size += sprintf(BLS, " %s\n",
- (p->flags & AHC_BIOS_ENABLED) ? "Enabled" : "Disabled");
- }
- else
- {
- size += sprintf(BLS, " Adaptec SCSI BIOS: %s\n",
- (p->flags & AHC_BIOS_ENABLED) ? "Enabled" : "Disabled");
}
+ size += sprintf(BLS, " Adapter SEEPROM Config: %s\n",
+ (p->flags & AHC_SEEPROM_FOUND) ? "SEEPROM found and used." :
+ ((p->flags & AHC_USEDEFAULTS) ? "SEEPROM not found, using defaults." :
+ "SEEPROM not found, using leftover BIOS values.") );
+ size += sprintf(BLS, " Adaptec SCSI BIOS: %s\n",
+ (p->flags & AHC_BIOS_ENABLED) ? "Enabled" : "Disabled");
size += sprintf(BLS, " IRQ: %d\n", HBAptr->irq);
size += sprintf(BLS, " SCBs: Active %d, Max Active %d,\n",
p->activescbs, p->max_activescbs);
size += sprintf(BLS, " Allocated %d, HW %d, "
"Page %d\n", p->scb_data->numscbs, p->scb_data->maxhscbs,
p->scb_data->maxscbs);
+ if (p->flags & AHC_EXTERNAL_SRAM)
+ size += sprintf(BLS, " Using External SCB SRAM\n");
size += sprintf(BLS, " Interrupts: %ld", p->isr_count);
- if (p->type & AHC_AIC7770)
+ if (p->chip & AHC_EISA)
{
size += sprintf(BLS, " %s\n",
(p->pause & IRQMS) ? "(Level Sensitive)" : "(Edge Triggered)");
@@ -244,7 +247,7 @@
size += sprintf(BLS, " Extended Translation: %sabled\n",
(p->flags & AHC_EXTEND_TRANS_A) ? "En" : "Dis");
size += sprintf(BLS, "Disconnect Enable Flags: 0x%04x\n", p->discenable);
- if (p->type & AHC_ULTRA)
+ if (p->features & (AHC_ULTRA | AHC_ULTRA2))
{
size += sprintf(BLS, " Ultra Enable Flags: 0x%04x\n", p->ultraenb);
}
@@ -268,7 +271,6 @@
size += sprintf(BLS, "%d,", p->dev_max_queue_depth[i]);
size += sprintf(BLS, "%d}\n", p->dev_max_queue_depth[i]);
-#ifdef AIC7XXX_PROC_STATS
size += sprintf(BLS, "\n");
size += sprintf(BLS, "Statistics:\n");
for (target = 0; target < MAX_TARGETS; target++)
@@ -280,7 +282,7 @@
{
continue;
}
- if (p->type & AHC_TWIN)
+ if (p->features & AHC_TWIN)
{
size += sprintf(BLS, "(scsi%d:%d:%d:%d)\n",
p->host_no, (target >> 3), (target & 0x7), lun);
@@ -290,10 +292,50 @@
size += sprintf(BLS, "(scsi%d:%d:%d:%d)\n",
p->host_no, 0, target, lun);
}
- size += sprintf(BLS, "nxfers %ld (%ld read;%ld written)\n",
+ size += sprintf(BLS, " Device using %s/%s\n",
+ (p->transinfo[target].cur_width == MSG_EXT_WDTR_BUS_16_BIT) ?
+ "Wide" : "Narrow",
+ (p->transinfo[target].cur_offset != 0) ?
+ "Sync transfers at" : "Async transfers." );
+ if (p->transinfo[target].cur_offset != 0)
+ {
+ struct aic7xxx_syncrate *sync_rate;
+ int period = p->transinfo[target].cur_period;
+ int rate = (p->transinfo[target].cur_width ==
+ MSG_EXT_WDTR_BUS_16_BIT) ? 1 : 0;
+
+ sync_rate = aic7xxx_find_syncrate(p, &period, AHC_SYNCRATE_ULTRA2);
+ if (sync_rate != NULL)
+ {
+ size += sprintf(BLS, " %s MByte/sec, offset %d\n",
+ sync_rate->rate[rate],
+ p->transinfo[target].cur_offset );
+ }
+ else
+ {
+ size += sprintf(BLS, " 3.3 MByte/sec, offset %d\n",
+ p->transinfo[target].cur_offset );
+ }
+ }
+ size += sprintf(BLS, " Device Negotiation Settings\n");
+ size += sprintf(BLS, " Period Offset Bus Width\n");
+ size += sprintf(BLS, "User %03d %03d %d\n",
+ p->transinfo[target].user_period,
+ p->transinfo[target].user_offset,
+ p->transinfo[target].user_width);
+ size += sprintf(BLS, "Goal %03d %03d %d\n",
+ p->transinfo[target].goal_period,
+ p->transinfo[target].goal_offset,
+ p->transinfo[target].goal_width);
+ size += sprintf(BLS, "Current %03d %03d %d\n",
+ p->transinfo[target].cur_period,
+ p->transinfo[target].cur_offset,
+ p->transinfo[target].cur_width);
+ size += sprintf(BLS, " Total transfers %ld (%ld read;%ld written)\n",
sp->xfers, sp->r_total, sp->w_total);
- size += sprintf(BLS, "blks(512) rd=%ld; blks(512) wr=%ld\n",
+ size += sprintf(BLS, " blks(512) rd=%ld; blks(512) wr=%ld\n",
sp->r_total512, sp->w_total512);
+#ifdef AIC7XXX_PROC_STATS
size += sprintf(BLS, "%s\n", HDRB);
size += sprintf(BLS, " Reads:");
for (i = 0; i < NUMBER(sp->r_bins); i++)
@@ -306,10 +348,10 @@
{
size += sprintf(BLS, "%6ld ", sp->w_bins[i]);
}
+#endif /* AIC7XXX_PROC_STATS */
size += sprintf(BLS, "\n\n");
}
}
-#endif /* AIC7XXX_PROC_STATS */
if (size >= aic7xxx_buffer_size)
{
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