patch-2.1.109 linux/arch/i386/kernel/head.S

• Lines: 144
• Date: Wed Jul 15 16:24:26 1998
• Orig file: v2.1.108/linux/arch/i386/kernel/head.S
• Orig date: Tue Jun 23 10:01:19 1998

diff -u --recursive --new-file v2.1.108/linux/arch/i386/kernel/head.S linux/arch/i386/kernel/head.S
@@ -148,80 +148,6 @@
  * we don't need to preserve eflags.
  */
 
-/*
- * Don't do this here. Do it in the CPU init code in C, right now we
- * must _not_ play unsafe games with the IO ports.
- *
- * A PPro and a P-II will also preserve the flags after a division,
- * so this "cyrix" test is just completely unsafe. IO port 0x22 is
- * some magic ACPI port on non-cyrix chips, so if this trashes that
- * we're screwed.
- *
- * This code belongs in "asm-i386/bugs.h" anyway (at which point we
- * _have_ done a CPUID for CPU's that support it directly, so we'll
- * be able to tell a intel P-II trivially at that point).
- */
-#undef CYRIX_CODE_BREAKAGE
-#ifdef CYRIX_CODE_BREAKAGE
-
-	/*
-	 * A Cyrix preserves flags in cases where other CPUs change
-	 * them in undefined ways. We need to know this since we may
-	 * need to enable the CPUID instruction at least. (Cyrix chips
-	 * prior to M2 have CPUID disabled by default, the Cx486s
-	 * didn't have it at all.)
-	 */
-	xor %ax,%ax
-	sahf
-	movb $5,%al
-	movb $2,%bl
-	div %bl
-	lahf
-	cmpb $2,%ah
-	jne ncyrix
-
-	/*
-	 * It behaves like a Cyrix so put "Cyrix" in the vendor id
-	 * field. It may be overwritten later with the real thing
-	 * if CPUID works.
-	 */
-	movl $0x69727943,X86_VENDOR_ID			# low 4 chars
-	movl $0x00000078,X86_VENDOR_ID+4		# next 4 chars
-
-	/*
-	 * N.B. The pattern of accesses to 0x22 and 0x23 is *important*
-	 *      so do not try and "optimise" it! For the same reason we
-	 *	do all this with interrupts off just to be sure.
-	 */
-#define setCx86(reg, val) \
-	movb reg,%al;	\
-	outb %al,$0x22;	\
-	movb val,%al;	\
-	outb %al,$0x23
-
-#define getCx86(reg) \
-	movb reg,%al;	\
-	outb %al,$0x22;	\
-	inb $0x23,%al
-
-	getCx86($0xc3)		# get CCR3
-	movb %al,%cl		# Save old value
-	movb %al,%bl
-	andb $0x0f,%bl		# Enable all config registers (for CCR4 access)
-	orb $0x10,%bl
-	setCx86($0xc3,%bl)
-
-	getCx86($0xe8)		# CCR4 |= CPUID
-	orb $0x80,%al
-	movb %al,%bl
-	setCx86($0xe8,%bl)
-
-	setCx86($0xc3,%cl)	# Restore old CCR3
-
-ncyrix:
-
-#endif
-
 	movl $3,X86		# at least 386
 	pushfl			# push EFLAGS
 	popl %eax		# get EFLAGS
@@ -246,7 +172,7 @@
 	pushl %ecx		# restore original EFLAGS
 	popfl
 	andl $0x200000,%eax
-	je nocpuid
+	je is486
 
 	/* get vendor info */
 	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
@@ -257,7 +183,7 @@
 	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
 
 	orl %eax,%eax			# do we have processor info as well?
-	je nocpuid
+	je is486
 
 	movl $1,%eax		# Use the CPUID instruction to get CPU type
 	cpuid
@@ -270,44 +196,6 @@
 	andb $0x0f,%cl		# mask mask revision
 	movb %cl,X86_MASK
 	movl %edx,X86_CAPABILITY
-
-nocpuid:
-
-#ifdef CYRIX_CODE_BREAKAGE
-	/*
-	 * Even if we had CPUID Cyrix tries to look compatible with
-	 * Intel so we have to go elsewhere for the nitty gritty.
-	 */
-	cmpl $0x69727943,X86_VENDOR_ID		# "Cyri[x.*]"?
-	jne is486				# maybe ...
-
-	movb $0xfe,X86_MODEL			# Generic Cx486?
-	movb $0,X86_MASK
-
-	getCx86($0xc3)		# Test for DEVID by writing CCR3
-	movb %al,%cl
-	movb %al,%bl
-	orb $0x80,%bl
-	setCx86($0xc3,%bl)
-	getCx86($0xc0)		# dummy to change bus
-	getCx86($0xc3)
-	cmpb %al,%cl
-	je is486		# not writable == no DEVID
-
-	setCx86($0xc3,%cl)	# restore CCR3
-
-	getCx86($0xff)		# get DEVID in preference to any CPUID
-	movb %al,X86_MASK
-	getCx86($0xfe)
-	movb %al,X86_MODEL
-	andb $0xf0,%al		# Check for 6x86(L)
-	cmp $0x30,%al
-	jnz is486
-	getCx86($0xe9)		# CCR5: reset SLOP bit, so that the udelay loop
-	andb $0xfd,%al		# works well on 6x86(L) CPU's.
-	movb %al,%bl
-	setCx86($0xe9,%bl)
-#endif
 
 is486:
 	movl %cr0,%eax		# 486 or better