patch-2.3.32 linux/drivers/video/cyber2000fb.h

• Lines: 129
• Date: Mon Dec 13 16:26:27 1999
• Orig file: v2.3.31/linux/drivers/video/cyber2000fb.h
• Orig date: Tue Dec 7 09:32:46 1999

diff -u --recursive --new-file v2.3.31/linux/drivers/video/cyber2000fb.h linux/drivers/video/cyber2000fb.h
@@ -52,6 +52,7 @@
 	char		dev_name[32];
 	unsigned int	initialised;
 	unsigned int	dev_id;
+	unsigned int	bus_64bit:1;
 
 	/*
 	 * palette
@@ -82,6 +83,120 @@
 #define VISUALID_64K		2
 #define VISUALID_16M		4
 #define VISUALID_32K		6
+
+#define K_CAP_X2_CTL1		0x49
+
+#define CAP_X_START		0x60
+#define CAP_X_END		0x62
+#define CAP_Y_START		0x64
+#define CAP_Y_END		0x66
+#define CAP_DDA_X_INIT		0x68
+#define CAP_DDA_X_INC		0x6a
+#define CAP_DDA_Y_INIT		0x6c
+#define CAP_DDA_Y_INC		0x6e
+
+#define EXT_FIFO_CTL		0x74
+
+#define CAP_PIP_X_START		0x80
+#define CAP_PIP_X_END		0x82
+#define CAP_PIP_Y_START		0x84
+#define CAP_PIP_Y_END		0x86
+
+#define CAP_NEW_CTL1		0x88
+
+#define CAP_NEW_CTL2		0x89
+
+#define CAP_MODE1		0xa4
+#define CAP_MODE1_8BIT			0x01	/* enable 8bit capture mode	*/
+#define CAP_MODE1_CCIR656		0x02	/* CCIR656 mode			*/
+#define CAP_MODE1_IGNOREVGT		0x04	/* ignore VGT			*/
+#define CAP_MODE1_ALTFIFO		0x10	/* use alternate FIFO for capture */
+#define CAP_MODE1_SWAPUV		0x20	/* swap UV bytes		*/
+#define CAP_MODE1_MIRRORY		0x40	/* mirror vertically		*/
+#define CAP_MODE1_MIRRORX		0x80	/* mirror horizontally		*/
+
+#define CAP_MODE2		0xa5
+
+#define Y_TV_CTL		0xae
+
+#define EXT_MEM_START		0xc0		/* ext start address 21 bits */
+#define HOR_PHASE_SHIFT		0xc2		/* high 3 bits */
+#define EXT_SRC_WIDTH		0xc3		/* ext offset phase  10 bits */
+#define EXT_SRC_HEIGHT		0xc4		/* high 6 bits */
+#define EXT_X_START		0xc5		/* ext->screen, 16 bits */
+#define EXT_X_END		0xc7		/* ext->screen, 16 bits */
+#define EXT_Y_START		0xc9		/* ext->screen, 16 bits */
+#define EXT_Y_END		0xcb		/* ext->screen, 16 bits */
+#define EXT_SRC_WIN_WIDTH	0xcd		/* 8 bits */
+#define EXT_COLOUR_COMPARE	0xce		/* 24 bits */
+#define EXT_DDA_X_INIT		0xd1		/* ext->screen 16 bits */
+#define EXT_DDA_X_INC		0xd3		/* ext->screen 16 bits */
+#define EXT_DDA_Y_INIT		0xd5		/* ext->screen 16 bits */
+#define EXT_DDA_Y_INC		0xd7		/* ext->screen 16 bits */
+
+#define VID_FIFO_CTL		0xd9
+
+#define VID_CAP_VFC		0xdb
+#define VID_CAP_VFC_YUV422		0x00	/* formats - does this cause conversion? */
+#define VID_CAP_VFC_RGB555		0x01
+#define VID_CAP_VFC_RGB565		0x02
+#define VID_CAP_VFC_RGB888_24		0x03
+#define VID_CAP_VFC_RGB888_32		0x04
+#define VID_CAP_VFC_DUP_PIX_ZOON	0x08	/* duplicate pixel zoom			*/
+#define VID_CAP_VFC_MOD_3RD_PIX		0x20	/* modify 3rd duplicated pixel		*/
+#define VID_CAP_VFC_DBL_H_PIX		0x40	/* double horiz pixels			*/
+#define VID_CAP_VFC_UV128		0x80	/* UV data offset by 128		*/
+
+#define VID_DISP_CTL1		0xdc
+#define VID_DISP_CTL1_INTRAM		0x01	/* video pixels go to internal RAM	*/
+#define VID_DISP_CTL1_IGNORE_CCOMP	0x02	/* ignore colour compare registers	*/
+#define VID_DISP_CTL1_NOCLIP		0x04	/* do not clip to 16235,16240		*/
+#define VID_DISP_CTL1_UV_AVG		0x08	/* U/V data is averaged			*/
+#define VID_DISP_CTL1_Y128		0x10	/* Y data offset by 128			*/
+#define VID_DISP_CTL1_VINTERPOL_OFF	0x20	/* vertical interpolation off		*/
+#define VID_DISP_CTL1_VID_OUT_WIN_FULL	0x40	/* video out window full		*/
+#define VID_DISP_CTL1_ENABLE_VID_WINDOW	0x80	/* enable video window			*/
+
+#define VID_FIFO_CTL1		0xdd
+
+#define VFAC_CTL1		0xe8
+#define VFAC_CTL1_CAPTURE		0x01	/* capture enable			*/
+#define VFAC_CTL1_VFAC_ENABLE		0x02	/* vfac enable				*/
+#define VFAC_CTL1_FREEZE_CAPTURE	0x04	/* freeze capture			*/
+#define VFAC_CTL1_FREEZE_CAPTURE_SYNC	0x08	/* sync freeze capture			*/
+#define VFAC_CTL1_VALIDFRAME_SRC	0x10	/* select valid frame source		*/
+#define VFAC_CTL1_PHILIPS		0x40	/* select Philips mode			*/
+#define VFAC_CTL1_MODVINTERPOLCLK	0x80	/* modify vertical interpolation clocl	*/
+
+#define VFAC_CTL2		0xe9
+#define VFAC_CTL2_INVERT_VIDDATAVALID	0x01	/* invert video data valid		*/
+#define VFAC_CTL2_INVERT_GRAPHREADY	0x02	/* invert graphic ready output sig	*/
+#define VFAC_CTL2_INVERT_DATACLK	0x04	/* invert data clock signal		*/
+#define VFAC_CTL2_INVERT_HSYNC		0x08	/* invert hsync input			*/
+#define VFAC_CTL2_INVERT_VSYNC		0x10	/* invert vsync input			*/
+#define VFAC_CTL2_INVERT_FRAME		0x20	/* invert frame odd/even input		*/
+#define VFAC_CTL2_INVERT_BLANK		0x40	/* invert blank output			*/
+#define VFAC_CTL2_INVERT_OVSYNC		0x80	/* invert other vsync input		*/
+
+#define VFAC_CTL3		0xea
+#define VFAC_CTL3_CAP_IRQ		0x40	/* enable capture interrupt		*/
+
+#define CAP_MEM_START		0xeb		/* 18 bits */
+#define CAP_MAP_WIDTH		0xed		/* high 6 bits */
+#define CAP_PITCH		0xee		/* 8 bits */
+
+#define CAP_CTL_MISC		0xef
+#define CAP_CTL_MISC_HDIV		0x01
+#define CAP_CTL_MISC_HDIV4		0x02
+#define CAP_CTL_MISC_ODDEVEN		0x04
+#define CAP_CTL_MISC_HSYNCDIV2		0x08
+#define CAP_CTL_MISC_SYNCTZHIGH		0x10
+#define CAP_CTL_MISC_SYNCTZOR		0x20
+#define CAP_CTL_MISC_DISPUSED		0x80
+
+#define REG_BANK		0xfa
+#define REG_BANK_Y			0x01
+#define REG_BANK_K			0x05
 
 #define K_CAP_X2_CTL1		0x49