patch-2.4.10 linux/arch/mips64/math-emu/cp1emu.c
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- Lines: 43
- Date:
Sun Sep 9 10:43:02 2001
- Orig file:
v2.4.9/linux/arch/mips64/math-emu/cp1emu.c
- Orig date:
Tue Jul 3 17:08:18 2001
diff -u --recursive --new-file v2.4.9/linux/arch/mips64/math-emu/cp1emu.c linux/arch/mips64/math-emu/cp1emu.c
@@ -53,7 +53,9 @@
#include <asm/asm.h>
#include <asm/branch.h>
+#include <asm/bootinfo.h>
#include <asm/byteorder.h>
+#include <asm/cpu.h>
#include <asm/inst.h>
#include <asm/uaccess.h>
#include <asm/processor.h>
@@ -851,11 +853,8 @@
current->thread.dsemul_epc = (unsigned long) cpc;
current->thread.dsemul_aerpc = (unsigned long) &dsemul_insns[1];
xcp->cp0_epc = VA_TO_REG & dsemul_insns[0];
+ flush_cache_sigtramp((unsigned long) dsemul_insns);
- /* What we'd really like to do is just flush the line(s) of the */
- /* icache containing the dsemulret instructions, but there's no */
- /* mechanism to do this yet... */
- flush_cache_all();
return SIGILL; /* force out of emulation loop */
}
@@ -1708,6 +1707,9 @@
oldepc = xcp->cp0_epc;
do {
+ if (current->need_resched)
+ schedule();
+
prevepc = xcp->cp0_epc;
insn = mips_get_word(xcp, REG_TO_VA(xcp->cp0_epc), &err);
if (err) {
@@ -1718,6 +1720,9 @@
sig = cop1Emulate(xcptno, xcp, ctx);
else
xcp->cp0_epc += 4; /* skip nops */
+
+ if (mips_cpu.options & MIPS_CPU_FPU)
+ break;
} while (xcp->cp0_epc > prevepc && sig == 0);
/* SIGILL indicates a non-fpu instruction */
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