patch-2.4.10 linux/arch/mips/jazz/jazzdma.c
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- Lines: 848
- Date:
Sun Sep 9 10:43:01 2001
- Orig file:
v2.4.9/linux/arch/mips/jazz/jazzdma.c
- Orig date:
Thu Feb 24 22:52:30 2000
diff -u --recursive --new-file v2.4.9/linux/arch/mips/jazz/jazzdma.c linux/arch/mips/jazz/jazzdma.c
@@ -1,6 +1,4 @@
/*
- * arch/mips/jazz/jazzdma.c
- *
* Mips Jazz DMA controller support
* Copyright (C) 1995, 1996 by Andreas Busse
*
@@ -27,7 +25,7 @@
*/
#define CONF_DEBUG_VDMA 0
-static unsigned long vdma_pagetable_start = 0;
+static unsigned long vdma_pagetable_start;
/*
* Debug stuff
@@ -44,16 +42,16 @@
*/
static inline void vdma_pgtbl_init(void)
{
- int i;
- unsigned long paddr = 0;
- VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-
- for (i=0; i<VDMA_PGTBL_ENTRIES; i++)
- {
- pgtbl[i].frame = paddr;
- pgtbl[i].owner = VDMA_PAGE_EMPTY;
- paddr += VDMA_PAGESIZE;
- }
+ int i;
+ unsigned long paddr = 0;
+ VDMA_PGTBL_ENTRY *pgtbl =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+
+ for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
+ pgtbl[i].frame = paddr;
+ pgtbl[i].owner = VDMA_PAGE_EMPTY;
+ paddr += VDMA_PAGESIZE;
+ }
}
/*
@@ -77,13 +75,12 @@
*/
vdma_pgtbl_init();
- r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,PHYSADDR(vdma_pagetable_start));
+ r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
+ PHYSADDR(vdma_pagetable_start));
r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
printk("VDMA: R4030 DMA pagetables initialized.\n");
-
- return KSEG0ADDR(vdma_pagetable_end);
}
/*
@@ -91,92 +88,90 @@
*/
unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
{
- VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
- int first;
- int last;
- int pages;
- unsigned int frame;
- unsigned long laddr;
- int i;
- unsigned long flags;
-
- /* check arguments */
-
- if (paddr > 0x1fffffff)
- {
- if (vdma_debug)
- printk("vdma_alloc: Invalid physical address: %08lx\n",paddr);
- return VDMA_ERROR; /* invalid physical address */
- }
- if (size > 0x400000 || size == 0)
- {
- if (vdma_debug)
- printk("vdma_alloc: Invalid size: %08lx\n",size);
- return VDMA_ERROR; /* invalid physical address */
- }
-
- save_and_cli (flags);
- /*
- * Find free chunk
- */
- pages = (size + 4095) >> 12; /* no. of pages to allocate */
- first = 0;
- while (1)
- {
- while (entry[first].owner != VDMA_PAGE_EMPTY &&
- first < VDMA_PGTBL_ENTRIES)
- first++;
- if (first+pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
- restore_flags (flags);
- return VDMA_ERROR;
- }
-
- last = first+1;
- while (entry[last].owner == VDMA_PAGE_EMPTY && last-first < pages)
- last++;
-
- if (last-first == pages)
- break; /* found */
- }
-
- /*
- * Mark pages as allocated
- */
- laddr = (first << 12) + (paddr & (VDMA_PAGESIZE-1));
- frame = paddr & ~(VDMA_PAGESIZE-1);
-
- for (i=first; i<last; i++)
- {
- entry[i].frame = frame;
- entry[i].owner = laddr;
- frame += VDMA_PAGESIZE;
- }
-
- /*
- * Update translation table and return logical start address
- */
- r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0);
-
- if (vdma_debug > 1)
- printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
- pages,laddr);
-
- if (vdma_debug > 2)
- {
- printk("LADDR: ");
- for (i=first; i<last; i++)
- printk("%08x ",i<<12);
- printk("\nPADDR: ");
- for (i=first; i<last; i++)
- printk("%08x ",entry[i].frame);
- printk("\nOWNER: ");
- for (i=first; i<last; i++)
- printk("%08x ",entry[i].owner);
- printk("\n");
- }
-
- restore_flags(flags);
- return laddr;
+ VDMA_PGTBL_ENTRY *entry =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ int first;
+ int last;
+ int pages;
+ unsigned int frame;
+ unsigned long laddr;
+ int i;
+ unsigned long flags;
+
+ /* check arguments */
+
+ if (paddr > 0x1fffffff) {
+ if (vdma_debug)
+ printk("vdma_alloc: Invalid physical address: %08lx\n",
+ paddr);
+ return VDMA_ERROR; /* invalid physical address */
+ }
+ if (size > 0x400000 || size == 0) {
+ if (vdma_debug)
+ printk("vdma_alloc: Invalid size: %08lx\n", size);
+ return VDMA_ERROR; /* invalid physical address */
+ }
+
+ save_and_cli(flags);
+ /*
+ * Find free chunk
+ */
+ pages = (size + 4095) >> 12; /* no. of pages to allocate */
+ first = 0;
+ while (1) {
+ while (entry[first].owner != VDMA_PAGE_EMPTY &&
+ first < VDMA_PGTBL_ENTRIES) first++;
+ if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
+ restore_flags(flags);
+ return VDMA_ERROR;
+ }
+
+ last = first + 1;
+ while (entry[last].owner == VDMA_PAGE_EMPTY
+ && last - first < pages)
+ last++;
+
+ if (last - first == pages)
+ break; /* found */
+ }
+
+ /*
+ * Mark pages as allocated
+ */
+ laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
+ frame = paddr & ~(VDMA_PAGESIZE - 1);
+
+ for (i = first; i < last; i++) {
+ entry[i].frame = frame;
+ entry[i].owner = laddr;
+ frame += VDMA_PAGESIZE;
+ }
+
+ /*
+ * Update translation table and return logical start address
+ */
+ r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
+
+ if (vdma_debug > 1)
+ printk
+ ("vdma_alloc: Allocated %d pages starting from %08lx\n",
+ pages, laddr);
+
+ if (vdma_debug > 2) {
+ printk("LADDR: ");
+ for (i = first; i < last; i++)
+ printk("%08x ", i << 12);
+ printk("\nPADDR: ");
+ for (i = first; i < last; i++)
+ printk("%08x ", entry[i].frame);
+ printk("\nOWNER: ");
+ for (i = first; i < last; i++)
+ printk("%08x ", entry[i].owner);
+ printk("\n");
+ }
+
+ restore_flags(flags);
+ return laddr;
}
/*
@@ -186,102 +181,103 @@
*/
int vdma_free(unsigned long laddr)
{
- VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
- int i;
+ VDMA_PGTBL_ENTRY *pgtbl =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ int i;
+
+ i = laddr >> 12;
+
+ if (pgtbl[i].owner != laddr) {
+ printk
+ ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
+ laddr);
+ return -1;
+ }
+
+ while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
+ pgtbl[i].owner = VDMA_PAGE_EMPTY;
+ i++;
+ }
- i = laddr >> 12;
+ if (vdma_debug > 1)
+ printk("vdma_free: freed %ld pages starting from %08lx\n",
+ i - (laddr >> 12), laddr);
- if (pgtbl[i].owner != laddr)
- {
- printk("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
- laddr);
- return -1;
- }
-
- while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES)
- {
- pgtbl[i].owner = VDMA_PAGE_EMPTY;
- i++;
- }
-
- if (vdma_debug > 1)
- printk("vdma_free: freed %ld pages starting from %08lx\n",
- i-(laddr>>12),laddr);
-
- return 0;
+ return 0;
}
/*
* Map certain page(s) to another physical address.
* Caller must have allocated the page(s) before.
*/
-int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
+int vdma_remap(unsigned long laddr, unsigned long paddr,
+ unsigned long size)
{
- VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
- int first, pages, npages;
+ VDMA_PGTBL_ENTRY *pgtbl =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+ int first, pages, npages;
+
+ if (laddr > 0xffffff) {
+ if (vdma_debug)
+ printk
+ ("vdma_map: Invalid logical address: %08lx\n",
+ laddr);
+ return -EINVAL; /* invalid logical address */
+ }
+ if (paddr > 0x1fffffff) {
+ if (vdma_debug)
+ printk
+ ("vdma_map: Invalid physical address: %08lx\n",
+ paddr);
+ return -EINVAL; /* invalid physical address */
+ }
+
+ npages = pages =
+ (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
+ first = laddr >> 12;
+ if (vdma_debug)
+ printk("vdma_remap: first=%x, pages=%x\n", first, pages);
+ if (first + pages > VDMA_PGTBL_ENTRIES) {
+ if (vdma_debug)
+ printk("vdma_alloc: Invalid size: %08lx\n", size);
+ return -EINVAL;
+ }
+
+ paddr &= ~(VDMA_PAGESIZE - 1);
+ while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
+ if (pgtbl[first].owner != laddr) {
+ if (vdma_debug)
+ printk("Trying to remap other's pages.\n");
+ return -EPERM; /* not owner */
+ }
+ pgtbl[first].frame = paddr;
+ paddr += VDMA_PAGESIZE;
+ first++;
+ pages--;
+ }
+
+ /*
+ * Update translation table
+ */
+ r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
+
+ if (vdma_debug > 2) {
+ int i;
+ pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
+ first = laddr >> 12;
+ printk("LADDR: ");
+ for (i = first; i < first + pages; i++)
+ printk("%08x ", i << 12);
+ printk("\nPADDR: ");
+ for (i = first; i < first + pages; i++)
+ printk("%08x ", pgtbl[i].frame);
+ printk("\nOWNER: ");
+ for (i = first; i < first + pages; i++)
+ printk("%08x ", pgtbl[i].owner);
+ printk("\n");
+ }
- if (laddr > 0xffffff)
- {
- if (vdma_debug)
- printk("vdma_map: Invalid logical address: %08lx\n",laddr);
- return -EINVAL; /* invalid logical address */
- }
- if (paddr > 0x1fffffff)
- {
- if (vdma_debug)
- printk("vdma_map: Invalid physical address: %08lx\n",paddr);
- return -EINVAL; /* invalid physical address */
- }
-
- npages = pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1;
- first = laddr >> 12;
- if (vdma_debug)
- printk("vdma_remap: first=%x, pages=%x\n",first,pages);
- if (first+pages > VDMA_PGTBL_ENTRIES)
- {
- if (vdma_debug)
- printk("vdma_alloc: Invalid size: %08lx\n",size);
- return -EINVAL;
- }
-
- paddr &= ~(VDMA_PAGESIZE-1);
- while (pages > 0 && first < VDMA_PGTBL_ENTRIES)
- {
- if (pgtbl[first].owner != laddr)
- {
- if (vdma_debug)
- printk("Trying to remap other's pages.\n");
- return -EPERM; /* not owner */
- }
- pgtbl[first].frame = paddr;
- paddr += VDMA_PAGESIZE;
- first++;
- pages--;
- }
-
- /*
- * Update translation table
- */
- r4030_write_reg32(JAZZ_R4030_TRSTBL_INV,0);
-
- if (vdma_debug > 2)
- {
- int i;
- pages = (((paddr & (VDMA_PAGESIZE-1)) + size) >> 12) + 1;
- first = laddr >> 12;
- printk("LADDR: ");
- for (i=first; i<first+pages; i++)
- printk("%08x ",i<<12);
- printk("\nPADDR: ");
- for (i=first; i<first+pages; i++)
- printk("%08x ",pgtbl[i].frame);
- printk("\nOWNER: ");
- for (i=first; i<first+pages; i++)
- printk("%08x ",pgtbl[i].owner);
- printk("\n");
- }
-
- return 0;
+ return 0;
}
/*
@@ -291,22 +287,22 @@
*/
unsigned long vdma_phys2log(unsigned long paddr)
{
- int i;
- int frame;
- VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
-
- frame = paddr & ~(VDMA_PAGESIZE-1);
-
- for (i=0; i<VDMA_PGTBL_ENTRIES; i++)
- {
- if (pgtbl[i].frame == frame)
- break;
- }
+ int i;
+ int frame;
+ VDMA_PGTBL_ENTRY *pgtbl =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
+
+ frame = paddr & ~(VDMA_PAGESIZE - 1);
+
+ for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
+ if (pgtbl[i].frame == frame)
+ break;
+ }
- if (i == VDMA_PGTBL_ENTRIES)
- return ~0UL;
+ if (i == VDMA_PGTBL_ENTRIES)
+ return ~0UL;
- return (i<<12) + (paddr & (VDMA_PAGESIZE-1));
+ return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
}
/*
@@ -314,44 +310,47 @@
*/
unsigned long vdma_log2phys(unsigned long laddr)
{
- VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *)vdma_pagetable_start;
+ VDMA_PGTBL_ENTRY *pgtbl =
+ (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
- return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE-1));
+ return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
}
-
+
/*
* Print DMA statistics
*/
void vdma_stats(void)
{
- int i;
-
- printk("vdma_stats: CONFIG: %08x\n",
- r4030_read_reg32(JAZZ_R4030_CONFIG));
- printk("R4030 translation table base: %08x\n",
- r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
- printk("R4030 translation table limit: %08x\n",
- r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
- printk("vdma_stats: INV_ADDR: %08x\n",
- r4030_read_reg32(JAZZ_R4030_INV_ADDR));
- printk("vdma_stats: R_FAIL_ADDR: %08x\n",
- r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
- printk("vdma_stats: M_FAIL_ADDR: %08x\n",
- r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
- printk("vdma_stats: IRQ_SOURCE: %08x\n",
- r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
- printk("vdma_stats: I386_ERROR: %08x\n",
- r4030_read_reg32(JAZZ_R4030_I386_ERROR));
- printk("vdma_chnl_modes: ");
- for (i=0; i<8; i++)
- printk("%04x ",
- (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(i<<5)));
- printk("\n");
- printk("vdma_chnl_enables: ");
- for (i=0; i<8; i++)
- printk("%04x ",
- (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(i<<5)));
- printk("\n");
+ int i;
+
+ printk("vdma_stats: CONFIG: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_CONFIG));
+ printk("R4030 translation table base: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
+ printk("R4030 translation table limit: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
+ printk("vdma_stats: INV_ADDR: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_INV_ADDR));
+ printk("vdma_stats: R_FAIL_ADDR: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
+ printk("vdma_stats: M_FAIL_ADDR: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
+ printk("vdma_stats: IRQ_SOURCE: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
+ printk("vdma_stats: I386_ERROR: %08x\n",
+ r4030_read_reg32(JAZZ_R4030_I386_ERROR));
+ printk("vdma_chnl_modes: ");
+ for (i = 0; i < 8; i++)
+ printk("%04x ",
+ (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
+ (i << 5)));
+ printk("\n");
+ printk("vdma_chnl_enables: ");
+ for (i = 0; i < 8; i++)
+ printk("%04x ",
+ (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (i << 5)));
+ printk("\n");
}
/*
@@ -363,33 +362,35 @@
*/
void vdma_enable(int channel)
{
- int status;
-
- if (vdma_debug)
- printk("vdma_enable: channel %d\n",channel);
-
- /*
- * Check error conditions first
- */
- status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
- if (status & 0x400)
- printk("VDMA: Channel %d: Address error!\n",channel);
- if (status & 0x200)
- printk("VDMA: Channel %d: Memory error!\n",channel);
-
- /*
- * Clear all interrupt flags
- */
- r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
- r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
- R4030_TC_INTR | R4030_MEM_INTR | R4030_ADDR_INTR);
-
- /*
- * Enable the desired channel
- */
- r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
- r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
- R4030_CHNL_ENABLE);
+ int status;
+
+ if (vdma_debug)
+ printk("vdma_enable: channel %d\n", channel);
+
+ /*
+ * Check error conditions first
+ */
+ status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
+ if (status & 0x400)
+ printk("VDMA: Channel %d: Address error!\n", channel);
+ if (status & 0x200)
+ printk("VDMA: Channel %d: Memory error!\n", channel);
+
+ /*
+ * Clear all interrupt flags
+ */
+ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5)) | R4030_TC_INTR
+ | R4030_MEM_INTR | R4030_ADDR_INTR);
+
+ /*
+ * Enable the desired channel
+ */
+ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5)) |
+ R4030_CHNL_ENABLE);
}
/*
@@ -397,28 +398,34 @@
*/
void vdma_disable(int channel)
{
- if (vdma_debug)
- {
- int status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-
- printk("vdma_disable: channel %d\n",channel);
- printk("VDMA: channel %d status: %04x (%s) mode: "
- "%02x addr: %06x count: %06x\n",
- channel,status,((status & 0x600) ? "ERROR" : "OK"),
- (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5)),
- (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5)),
- (unsigned)r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5)));
- }
-
- r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
- r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) &
- ~R4030_CHNL_ENABLE);
-
- /*
- * After disabling a DMA channel a remote bus register should be
- * read to ensure that the current DMA acknowledge cycle is completed.
- */
- *((volatile unsigned int *)JAZZ_DUMMY_DEVICE);
+ if (vdma_debug) {
+ int status =
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5));
+
+ printk("vdma_disable: channel %d\n", channel);
+ printk("VDMA: channel %d status: %04x (%s) mode: "
+ "%02x addr: %06x count: %06x\n",
+ channel, status,
+ ((status & 0x600) ? "ERROR" : "OK"),
+ (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
+ (channel << 5)),
+ (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
+ (channel << 5)),
+ (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
+ (channel << 5)));
+ }
+
+ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5)) &
+ ~R4030_CHNL_ENABLE);
+
+ /*
+ * After disabling a DMA channel a remote bus register should be
+ * read to ensure that the current DMA acknowledge cycle is completed.
+ */
+ *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
}
/*
@@ -432,56 +439,60 @@
*/
void vdma_set_mode(int channel, int mode)
{
- if (vdma_debug)
- printk("vdma_set_mode: channel %d, mode 0x%x\n", channel, mode);
-
- switch(channel)
- {
- case JAZZ_SCSI_DMA: /* scsi */
- r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5),
+ if (vdma_debug)
+ printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
+ mode);
+
+ switch (channel) {
+ case JAZZ_SCSI_DMA: /* scsi */
+ r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
/* R4030_MODE_FAST | */
/* R4030_MODE_BURST | */
- R4030_MODE_INTR_EN |
- R4030_MODE_WIDTH_16 |
- R4030_MODE_ATIME_80);
- break;
-
- case JAZZ_FLOPPY_DMA: /* floppy */
- r4030_write_reg32(JAZZ_R4030_CHNL_MODE+(channel<<5),
+ R4030_MODE_INTR_EN |
+ R4030_MODE_WIDTH_16 |
+ R4030_MODE_ATIME_80);
+ break;
+
+ case JAZZ_FLOPPY_DMA: /* floppy */
+ r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
/* R4030_MODE_FAST | */
/* R4030_MODE_BURST | */
- R4030_MODE_INTR_EN |
- R4030_MODE_WIDTH_8 |
- R4030_MODE_ATIME_120);
- break;
-
- case JAZZ_AUDIOL_DMA:
- case JAZZ_AUDIOR_DMA:
- printk("VDMA: Audio DMA not supported yet.\n");
- break;
-
- default:
- printk("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
- channel);
- }
-
- switch(mode)
- {
- case DMA_MODE_READ:
- r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
- r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) &
- ~R4030_CHNL_WRITE);
- break;
-
- case DMA_MODE_WRITE:
- r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5),
- r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5)) |
- R4030_CHNL_WRITE);
- break;
-
- default:
- printk("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",mode);
- }
+ R4030_MODE_INTR_EN |
+ R4030_MODE_WIDTH_8 |
+ R4030_MODE_ATIME_120);
+ break;
+
+ case JAZZ_AUDIOL_DMA:
+ case JAZZ_AUDIOR_DMA:
+ printk("VDMA: Audio DMA not supported yet.\n");
+ break;
+
+ default:
+ printk
+ ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
+ channel);
+ }
+
+ switch (mode) {
+ case DMA_MODE_READ:
+ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5)) &
+ ~R4030_CHNL_WRITE);
+ break;
+
+ case DMA_MODE_WRITE:
+ r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
+ r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
+ (channel << 5)) |
+ R4030_CHNL_WRITE);
+ break;
+
+ default:
+ printk
+ ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
+ mode);
+ }
}
/*
@@ -489,10 +500,11 @@
*/
void vdma_set_addr(int channel, long addr)
{
- if (vdma_debug)
- printk("vdma_set_addr: channel %d, addr %lx\n",channel,addr);
+ if (vdma_debug)
+ printk("vdma_set_addr: channel %d, addr %lx\n", channel,
+ addr);
- r4030_write_reg32(JAZZ_R4030_CHNL_ADDR+(channel<<5),addr);
+ r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
}
/*
@@ -500,25 +512,28 @@
*/
void vdma_set_count(int channel, int count)
{
- if (vdma_debug)
- printk("vdma_set_count: channel %d, count %08x\n",channel,(unsigned)count);
-
- r4030_write_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5),count);
+ if (vdma_debug)
+ printk("vdma_set_count: channel %d, count %08x\n", channel,
+ (unsigned) count);
+
+ r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
}
-
+
/*
* Get Residual
*/
int vdma_get_residue(int channel)
{
- int residual;
-
- residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT+(channel<<5));
-
- if (vdma_debug)
- printk("vdma_get_residual: channel %d: residual=%d\n",channel,residual);
-
- return residual;
+ int residual;
+
+ residual =
+ r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
+
+ if (vdma_debug)
+ printk("vdma_get_residual: channel %d: residual=%d\n",
+ channel, residual);
+
+ return residual;
}
/*
@@ -526,12 +541,13 @@
*/
int vdma_get_enable(int channel)
{
- int enable;
-
- enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE+(channel<<5));
-
- if (vdma_debug)
- printk("vdma_get_enable: channel %d: enable=%d\n",channel,enable);
-
- return enable;
+ int enable;
+
+ enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
+
+ if (vdma_debug)
+ printk("vdma_get_enable: channel %d: enable=%d\n", channel,
+ enable);
+
+ return enable;
}
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)