patch-2.4.10 linux/drivers/message/fusion/lsi/mpi_cnfg.h
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- Lines: 1036
- Date:
Fri Sep 7 09:28:38 2001
- Orig file:
v2.4.9/linux/drivers/message/fusion/lsi/mpi_cnfg.h
- Orig date:
Wed Jul 25 17:10:20 2001
diff -u --recursive --new-file v2.4.9/linux/drivers/message/fusion/lsi/mpi_cnfg.h linux/drivers/message/fusion/lsi/mpi_cnfg.h
@@ -6,7 +6,7 @@
* Title: MPI Config message, structures, and Pages
* Creation Date: July 27, 2000
*
- * MPI Version: 01.01.09
+ * MPI Version: 01.01.11
*
* Version History
* ---------------
@@ -60,6 +60,18 @@
* MPI_CONFIG_PAGETYPE_RAID_VOLUME.
* Added definitions and structures for IOC Page 2 and
* RAID Volume Page 2.
+ * 03-27-01 01.01.10 Added CONFIG_PAGE_FC_PORT_8 and CONFIG_PAGE_FC_PORT_9.
+ * CONFIG_PAGE_FC_PORT_3 now supports persistent by DID.
+ * Added VendorId and ProductRevLevel fields to
+ * RAIDVOL2_IM_PHYS_ID struct.
+ * Modified values for MPI_FCPORTPAGE0_FLAGS_ATTACH_
+ * defines to make them compatible to MPI version 1.0.
+ * Added structure offset comments.
+ * 04-09-01 01.01.11 Added some new defines for the PageAddress field and
+ * removed some obsolete ones.
+ * Added IO Unit Page 3.
+ * Modified defines for Scsi Port Page 2.
+ * Modified RAID Volume Pages.
* --------------------------------------------------------------------------
*/
@@ -75,10 +87,10 @@
typedef struct _CONFIG_PAGE_HEADER
{
- U8 PageVersion;
- U8 PageLength;
- U8 PageNumber;
- U8 PageType;
+ U8 PageVersion; /* 00h */
+ U8 PageLength; /* 01h */
+ U8 PageNumber; /* 02h */
+ U8 PageType; /* 03h */
} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
@@ -120,17 +132,19 @@
****************************************************************************/
#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000)
+#define MPI_SCSI_DEVICE_FORM_TARGETID (0x00000000)
+#define MPI_SCSI_DEVICE_FORM_RAID_PHYS_DEV_NUM (0x10000000)
#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
-
-#define MPI_SCSI_LUN_TARGET_ID_MASK (0x000000FF)
-#define MPI_SCSI_LUN_TARGET_ID_SHIFT (0)
-#define MPI_SCSI_LUN_BUS_MASK (0x0000FF00)
-#define MPI_SCSI_LUN_BUS_SHIFT (8)
-#define MPI_SCSI_LUN_LUN_MASK (0x00FF0000)
-#define MPI_SCSI_LUN_LUN_SHIFT (16)
+#define MPI_SCSI_DEVICE_VOLUME_TARG_ID_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_VOLUME_TARG_ID_SHIFT (0)
+#define MPI_SCSI_DEVICE_VOLUME_BUS_MASK (0x0000FF00)
+#define MPI_SCSI_DEVICE_VOLUME_BUS_SHIFT (8)
+#define MPI_SCSI_DEVICE_PHYS_DISK_NUM_MASK (0x00FF0000)
+#define MPI_SCSI_DEVICE_PHYS_DISK_NUM_SHIFT (16)
#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
@@ -159,17 +173,17 @@
/****************************************************************************/
typedef struct _MSG_CONFIG
{
- U8 Action;
- U8 Reserved;
- U8 ChainOffset;
- U8 Function;
- U8 Reserved1[3];
- U8 MsgFlags;
- U32 MsgContext;
- U8 Reserved2[8];
- fCONFIG_PAGE_HEADER Header;
- U32 PageAddress;
- SGE_IO_UNION PageBufferSGE;
+ U8 Action; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U8 Reserved1[3]; /* 04h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2[8]; /* 0Ch */
+ fCONFIG_PAGE_HEADER Header; /* 14h */
+ U32 PageAddress; /* 18h */
+ SGE_IO_UNION PageBufferSGE; /* 1Ch */
} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
Config_t, MPI_POINTER pConfig_t;
@@ -178,12 +192,9 @@
/* Action field values */
/****************************************************************************/
#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00)
-/*#define MPI_CONFIG_ACTION_PAGE_READ (0x01) *//* obsolete */
#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
-/*#define MPI_CONFIG_ACTION_PAGE_WRITE (0x02) *//* obsolete */
#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03)
-/*#define MPI_CONFIG_ACTION_PAGE_WRITE_COMMIT (0x04) */ /* obsolete */
#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
@@ -192,17 +203,17 @@
/* Config Reply Message */
typedef struct _MSG_CONFIG_REPLY
{
- U8 Action;
- U8 Reserved;
- U8 MsgLength;
- U8 Function;
- U8 Reserved1[3];
- U8 MsgFlags;
- U32 MsgContext;
- U8 Reserved2[2];
- U16 IOCStatus;
- U32 IOCLogInfo;
- fCONFIG_PAGE_HEADER Header;
+ U8 Action; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U8 Reserved1[3]; /* 04h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2[2]; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ fCONFIG_PAGE_HEADER Header; /* 14h */
} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
ConfigReply_t, MPI_POINTER pConfigReply_t;
@@ -226,12 +237,12 @@
typedef struct _CONFIG_PAGE_MANUFACTURING_0
{
- fCONFIG_PAGE_HEADER Header;
- U8 ChipName[16];
- U8 ChipRevision[8];
- U8 BoardName[16];
- U8 BoardAssembly[16];
- U8 BoardTracerNumber[16];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U8 ChipName[16]; /* 04h */
+ U8 ChipRevision[8]; /* 14h */
+ U8 BoardName[16]; /* 1Ch */
+ U8 BoardAssembly[16]; /* 2Ch */
+ U8 BoardTracerNumber[16]; /* 3Ch */
} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
@@ -241,8 +252,8 @@
typedef struct _CONFIG_PAGE_MANUFACTURING_1
{
- fCONFIG_PAGE_HEADER Header;
- U8 VPD[256];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U8 VPD[256]; /* 04h */
} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
@@ -251,18 +262,18 @@
typedef struct _MPI_CHIP_REVISION_ID
{
- U16 DeviceID;
- U8 PCIRevisionID;
- U8 Reserved;
+ U16 DeviceID; /* 00h */
+ U8 PCIRevisionID; /* 02h */
+ U8 Reserved; /* 03h */
} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
typedef struct _CONFIG_PAGE_MANUFACTURING_2
{
- fCONFIG_PAGE_HEADER Header;
- MPI_CHIP_REVISION_ID ChipId;
- U32 HwSettings[1];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ MPI_CHIP_REVISION_ID ChipId; /* 04h */
+ U32 HwSettings[1]; /* 08h */
} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
@@ -271,9 +282,9 @@
typedef struct _CONFIG_PAGE_MANUFACTURING_3
{
- fCONFIG_PAGE_HEADER Header;
- MPI_CHIP_REVISION_ID ChipId;
- U32 Info[1];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ MPI_CHIP_REVISION_ID ChipId; /* 04h */
+ U32 Info[1]; /* 08h */
} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
@@ -286,8 +297,8 @@
typedef struct _CONFIG_PAGE_IO_UNIT_0
{
- fCONFIG_PAGE_HEADER Header;
- U64 UniqueValue;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U64 UniqueValue; /* 04h */
} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
@@ -296,8 +307,8 @@
typedef struct _CONFIG_PAGE_IO_UNIT_1
{
- fCONFIG_PAGE_HEADER Header;
- U32 Flags;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
@@ -313,9 +324,9 @@
typedef struct _MPI_ADAPTER_INFO
{
- U8 PciBusNumber;
- U8 PciDeviceAndFunctionNumber;
- U16 AdapterFlags;
+ U8 PciBusNumber; /* 00h */
+ U8 PciDeviceAndFunctionNumber; /* 01h */
+ U16 AdapterFlags; /* 02h */
} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
@@ -324,10 +335,10 @@
typedef struct _CONFIG_PAGE_IO_UNIT_2
{
- fCONFIG_PAGE_HEADER Header;
- U32 Flags;
- U32 BiosVersion;
- MPI_ADAPTER_INFO AdapterOrder[4];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U32 BiosVersion; /* 08h */
+ MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
@@ -340,34 +351,53 @@
#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
+typedef struct _CONFIG_PAGE_IO_UNIT_3
+{
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 VolumeSettings; /* 04h */
+ U8 InfoOffset0; /* 08h */
+ U8 InfoSize0; /* 09h */
+ U8 InfoOffset1; /* 0Ah */
+ U8 InfoSize1; /* 0Bh */
+ U8 InquirySize; /* 0Ch */
+ U8 Reserved; /* 0Dh */
+ U16 Reserved2; /* 0Eh */
+ U8 InquiryData[56]; /* 10h */
+} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
+ IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
+
+#define MPI_IOUNITPAGE3_PAGEVERSION (0x00)
+
+
/****************************************************************************/
/* IOC Config Pages */
/****************************************************************************/
typedef struct _CONFIG_PAGE_IOC_0
{
- fCONFIG_PAGE_HEADER Header;
- U32 TotalNVStore;
- U32 FreeNVStore;
- U16 VendorID;
- U16 DeviceID;
- U8 RevisionID;
- U8 Reserved[3];
- U32 ClassCode;
- U16 SubsystemVendorID;
- U16 SubsystemID;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 TotalNVStore; /* 04h */
+ U32 FreeNVStore; /* 08h */
+ U16 VendorID; /* 0Ch */
+ U16 DeviceID; /* 0Eh */
+ U8 RevisionID; /* 10h */
+ U8 Reserved[3]; /* 11h */
+ U32 ClassCode; /* 14h */
+ U16 SubsystemVendorID; /* 18h */
+ U16 SubsystemID; /* 1Ah */
} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
IOCPage0_t, MPI_POINTER pIOCPage0_t;
#define MPI_IOCPAGE0_PAGEVERSION (0x01)
+
typedef struct _CONFIG_PAGE_IOC_1
{
- fCONFIG_PAGE_HEADER Header;
- U32 Flags;
- U32 CoalescingTimeout;
- U8 CoalescingDepth;
- U8 Reserved[3];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U32 CoalescingTimeout; /* 08h */
+ U8 CoalescingDepth; /* 0Ch */
+ U8 Reserved[3]; /* 0Dh */
} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
IOCPage1_t, MPI_POINTER pIOCPage1_t;
@@ -375,26 +405,27 @@
#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
+
typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
{
- U8 VolumeTargetID;
- U8 VolumeBus;
- U16 Reserved;
- U8 VolumeVersionMinor;
- U8 VolumeVersionMajor;
- U8 VolumeRaidType;
- U8 Reserved1;
+ U8 VolumeTargetID; /* 00h */
+ U8 VolumeBus; /* 01h */
+ U16 Reserved; /* 02h */
+ U8 VolumeVersionMinor; /* 04h */
+ U8 VolumeVersionMajor; /* 05h */
+ U8 VolumeRaidType; /* 06h */
+ U8 Reserved1; /* 07h */
} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
typedef struct _CONFIG_PAGE_IOC_2
{
- fCONFIG_PAGE_HEADER Header;
- U32 CapabilitiesFlags;
- U8 NumActiveVolumes;
- U8 MaxVolumes;
- U16 Reserved;
- fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[1];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 CapabilitiesFlags; /* 04h */
+ U8 NumActiveVolumes; /* 08h */
+ U8 MaxVolumes; /* 09h */
+ U16 Reserved; /* 0Ah */
+ fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[1]; /* 0Ch */
} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
IOCPage2_t, MPI_POINTER pIOCPage2_t;
@@ -423,9 +454,9 @@
typedef struct _CONFIG_PAGE_SCSI_PORT_0
{
- fCONFIG_PAGE_HEADER Header;
- U32 Capabilities;
- U32 PhysicalInterface;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Capabilities; /* 04h */
+ U32 PhysicalInterface; /* 08h */
} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
@@ -445,10 +476,11 @@
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02)
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03)
+
typedef struct _CONFIG_PAGE_SCSI_PORT_1
{
- fCONFIG_PAGE_HEADER Header;
- U32 Configuration;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Configuration; /* 04h */
} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
@@ -457,20 +489,21 @@
#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
+
typedef struct _MPI_DEVICE_INFO
{
- U8 Timeout;
- U8 SyncFactor;
- U16 DeviceFlags;
+ U8 Timeout; /* 00h */
+ U8 SyncFactor; /* 01h */
+ U16 DeviceFlags; /* 02h */
} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
typedef struct _CONFIG_PAGE_SCSI_PORT_2
{
- fCONFIG_PAGE_HEADER Header;
- U32 PortFlags;
- U32 PortSettings;
- MPI_DEVICE_INFO DeviceSettings[16];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 PortFlags; /* 04h */
+ U32 PortSettings; /* 08h */
+ MPI_DEVICE_INFO DeviceSettings[16]; /* 0Ch */
} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
@@ -492,15 +525,15 @@
#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)
#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)
#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)
-#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00000001)
-#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00000003)
+#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)
+#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000)
-#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x00000001)
-#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x00000002)
-#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x00000004)
-#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x00000008)
-#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x00000010)
-#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x00000020)
+#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001)
+#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002)
+#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004)
+#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008)
+#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010)
+#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020)
/****************************************************************************/
@@ -509,9 +542,9 @@
typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
{
- fCONFIG_PAGE_HEADER Header;
- U32 NegotiatedParameters;
- U32 Information;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 NegotiatedParameters; /* 04h */
+ U32 Information; /* 08h */
} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
@@ -528,16 +561,17 @@
#define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001)
+
typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
{
- fCONFIG_PAGE_HEADER Header;
- U32 RequestedParameters;
- U32 DomainValidation;
- U32 Configuration;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 RequestedParameters; /* 04h */
+ U32 Reserved; /* 08h */
+ U32 Configuration; /* 0Ch */
} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
-#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x01)
+#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x02)
#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
@@ -553,29 +587,71 @@
#define MPI_SCSIDEVPAGE1_CONF_PPR_ALLOWED (0x00000001)
+
+typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
+{
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 DomainValidation; /* 04h */
+ U32 ParityPipeSelect; /* 08h */
+ U32 DataPipeSelect; /* 0Ch */
+} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
+ SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
+
+#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x00)
+
+#define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010)
+#define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020)
+#define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380)
+#define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00)
+#define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000)
+#define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000)
+#define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000)
+#define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000)
+#define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000)
+
+#define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003)
+
+#define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000)
+#define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000)
+
+
/****************************************************************************/
/* FC Port Config Pages */
/****************************************************************************/
typedef struct _CONFIG_PAGE_FC_PORT_0
{
- fCONFIG_PAGE_HEADER Header;
- U32 Flags;
- U8 MPIPortNumber;
- U8 LinkType;
- U8 PortState;
- U8 Reserved;
- U32 PortIdentifier;
- U64 WWNN;
- U64 WWPN;
- U32 SupportedServiceClass;
- U32 SupportedSpeeds;
- U32 CurrentSpeed;
- U32 MaxFrameSize;
- U64 FabricWWNN;
- U64 FabricWWPN;
- U32 DiscoveredPortsCount;
- U32 MaxInitiators;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U8 MPIPortNumber; /* 08h */
+ U8 LinkType; /* 09h */
+ U8 PortState; /* 0Ah */
+ U8 Reserved; /* 0Bh */
+ U32 PortIdentifier; /* 0Ch */
+ U64 WWNN; /* 10h */
+ U64 WWPN; /* 18h */
+ U32 SupportedServiceClass; /* 20h */
+ U32 SupportedSpeeds; /* 24h */
+ U32 CurrentSpeed; /* 28h */
+ U32 MaxFrameSize; /* 2Ch */
+ U64 FabricWWNN; /* 30h */
+ U64 FabricWWPN; /* 38h */
+ U32 DiscoveredPortsCount; /* 40h */
+ U32 MaxInitiators; /* 44h */
} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
@@ -591,12 +667,12 @@
#define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020)
#define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000030)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000700)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000000)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000100)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000200)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000300)
-#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000700)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400)
+#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800)
#define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00)
#define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01)
@@ -639,14 +715,14 @@
typedef struct _CONFIG_PAGE_FC_PORT_1
{
- fCONFIG_PAGE_HEADER Header;
- U32 Flags;
- U64 NoSEEPROMWWNN;
- U64 NoSEEPROMWWPN;
- U8 HardALPA;
- U8 LinkConfig;
- U8 TopologyConfig;
- U8 Reserved;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Flags; /* 04h */
+ U64 NoSEEPROMWWNN; /* 08h */
+ U64 NoSEEPROMWWPN; /* 10h */
+ U8 HardALPA; /* 18h */
+ U8 LinkConfig; /* 19h */
+ U8 TopologyConfig; /* 1Ah */
+ U8 Reserved; /* 1Bh */
} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
@@ -679,23 +755,36 @@
typedef struct _CONFIG_PAGE_FC_PORT_2
{
- fCONFIG_PAGE_HEADER Header;
- U8 NumberActive;
- U8 ALPA[126];
- U8 Reserved;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U8 NumberActive; /* 04h */
+ U8 ALPA[126]; /* 05h */
+ U8 Reserved; /* 83h */
} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
#define MPI_FCPORTPAGE2_PAGEVERSION (0x00)
+typedef struct _WWN_FORMAT
+{
+ U64 WWNN; /* 00h */
+ U64 WWPN; /* 08h */
+} WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
+ WWNFormat, MPI_POINTER pWWNFormat;
+
+typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
+{
+ WWN_FORMAT WWN;
+ U32 Did;
+} FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
+ PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
+
typedef struct _FC_PORT_PERSISTENT
{
- U64 WWNN;
- U64 WWPN;
- U8 TargetID;
- U8 Bus;
- U16 Flags;
+ FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier; /* 00h */
+ U8 TargetID; /* 10h */
+ U8 Bus; /* 11h */
+ U16 Flags; /* 12h */
} FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
PersistentData_t, MPI_POINTER pPersistentData_t;
@@ -704,22 +793,23 @@
#define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002)
#define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004)
#define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008)
+#define MPI_PERSISTENT_FLAGS_BY_DID (0x0080)
typedef struct _CONFIG_PAGE_FC_PORT_3
{
- fCONFIG_PAGE_HEADER Header;
- FC_PORT_PERSISTENT Entry[1];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ FC_PORT_PERSISTENT Entry[1]; /* 04h */
} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
-#define MPI_FCPORTPAGE3_PAGEVERSION (0x00)
+#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_FC_PORT_4
{
- fCONFIG_PAGE_HEADER Header;
- U32 PortFlags;
- U32 PortSettings;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 PortFlags; /* 04h */
+ U32 PortSettings; /* 08h */
} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
@@ -738,18 +828,18 @@
typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
{
- U8 Flags;
- U8 AliasAlpa;
- U16 Reserved;
- U64 AliasWWNN;
- U64 AliasWWPN;
+ U8 Flags; /* 00h */
+ U8 AliasAlpa; /* 01h */
+ U16 Reserved; /* 02h */
+ U64 AliasWWNN; /* 04h */
+ U64 AliasWWPN; /* 0Ch */
} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
typedef struct _CONFIG_PAGE_FC_PORT_5
{
- fCONFIG_PAGE_HEADER Header;
- fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo[1];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo[1]; /* 04h */
} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
@@ -761,24 +851,24 @@
typedef struct _CONFIG_PAGE_FC_PORT_6
{
- fCONFIG_PAGE_HEADER Header;
- U32 Reserved;
- U64 TimeSinceReset;
- U64 TxFrames;
- U64 RxFrames;
- U64 TxWords;
- U64 RxWords;
- U64 LipCount;
- U64 NosCount;
- U64 ErrorFrames;
- U64 DumpedFrames;
- U64 LinkFailureCount;
- U64 LossOfSyncCount;
- U64 LossOfSignalCount;
- U64 PrimativeSeqErrCount;
- U64 InvalidTxWordCount;
- U64 InvalidCrcCount;
- U64 FcpInitiatorIoCount;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved; /* 04h */
+ U64 TimeSinceReset; /* 08h */
+ U64 TxFrames; /* 10h */
+ U64 RxFrames; /* 18h */
+ U64 TxWords; /* 20h */
+ U64 RxWords; /* 28h */
+ U64 LipCount; /* 30h */
+ U64 NosCount; /* 38h */
+ U64 ErrorFrames; /* 40h */
+ U64 DumpedFrames; /* 48h */
+ U64 LinkFailureCount; /* 50h */
+ U64 LossOfSyncCount; /* 58h */
+ U64 LossOfSignalCount; /* 60h */
+ U64 PrimativeSeqErrCount; /* 68h */
+ U64 InvalidTxWordCount; /* 70h */
+ U64 InvalidCrcCount; /* 78h */
+ U64 FcpInitiatorIoCount; /* 80h */
} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
@@ -787,35 +877,65 @@
typedef struct _CONFIG_PAGE_FC_PORT_7
{
- fCONFIG_PAGE_HEADER Header;
- U32 Reserved;
- U8 PortSymbolicName[256];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved; /* 04h */
+ U8 PortSymbolicName[256]; /* 08h */
} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
+typedef struct _CONFIG_PAGE_FC_PORT_8
+{
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 BitVector[8]; /* 04h */
+} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
+ FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
+
+#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
+
+
+typedef struct _CONFIG_PAGE_FC_PORT_9
+{
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved; /* 04h */
+ U64 GlobalWWPN; /* 08h */
+ U64 GlobalWWNN; /* 10h */
+ U32 UnitType; /* 18h */
+ U32 PhysicalPortNumber; /* 1Ch */
+ U32 NumAttachedNodes; /* 20h */
+ U16 IPVersion; /* 24h */
+ U16 UDPPortNumber; /* 26h */
+ U8 IPAddress[16]; /* 28h */
+ U16 Reserved1; /* 38h */
+ U16 TopologyDiscoveryFlags; /* 3Ah */
+} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
+ FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
+
+#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
+
+
/****************************************************************************/
/* FC Device Config Pages */
/****************************************************************************/
typedef struct _CONFIG_PAGE_FC_DEVICE_0
{
- fCONFIG_PAGE_HEADER Header;
- U64 WWNN;
- U64 WWPN;
- U32 PortIdentifier;
- U8 Protocol;
- U8 Flags;
- U16 BBCredit;
- U16 MaxRxFrameSize;
- U8 Reserved1;
- U8 PortNumber;
- U8 FcPhLowestVersion;
- U8 FcPhHighestVersion;
- U8 CurrentTargetID;
- U8 CurrentBus;
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U64 WWNN; /* 04h */
+ U64 WWPN; /* 0Ch */
+ U32 PortIdentifier; /* 14h */
+ U8 Protocol; /* 18h */
+ U8 Flags; /* 19h */
+ U16 BBCredit; /* 1Ah */
+ U16 MaxRxFrameSize; /* 1Ch */
+ U8 Reserved1; /* 1Eh */
+ U8 PortNumber; /* 1Fh */
+ U8 FcPhLowestVersion; /* 20h */
+ U8 FcPhHighestVersion; /* 21h */
+ U8 CurrentTargetID; /* 22h */
+ U8 CurrentBus; /* 23h */
} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
@@ -841,70 +961,75 @@
/* RAID Volume Config Pages */
/****************************************************************************/
-typedef struct _RAIDVOL2_EM_PHYS_ID
+typedef struct _RAIDVOL2_IM_PHYS_ID
{
- U8 TargetID;
- U8 Bus;
- U8 IocNumber;
- U8 PhysDiskNumber;
- U8 Reserved[8];
- U8 PhysicalDiskIdentifier[16];
- U8 ProductId[16];
- U8 InfoOffset0;
- U8 InfoSize0;
- U8 InfoOffset1;
- U8 InfoSize1;
- U8 Info[32];
-} RAIDVOL2_EM_PHYS_ID, MPI_POINTER PTR_RAIDVOL2_EM_PHYS_ID,
- RaidVol2EmPhysicalID_t, MPI_POINTER pRaidVol2EmPhysicalID_t;
-
-typedef struct _RAIDVOL2_EM_DISK_INFO
-{
- U32 DiskStatus;
- U32 DeviceSettings;
- U16 ErrorCount;
- U16 Reserved;
- U8 ErrorCdbByte;
- U8 ErrorSenseKey;
- U8 ErrorASC;
- U8 ErrorASCQ;
- U16 SmartCount;
- U8 SmartASC;
- U8 SmartASCQ;
-} RAIDVOL2_EM_DISK_INFO, MPI_POINTER PTR_RAIDVOL2_EM_DISK_INFO,
- RaidVol2EmDiskInfo_t, MPI_POINTER pRaidVol2EmDiskInfo_t;
-
-/* RAID Volume 2 EM Physical Disk DiskStatus flags */
-
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_PRIMARY (0x00000001)
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_SECONDARY (0x00000002)
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_HOT_SPARE (0x00000004)
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_OUT_OF_SYNC (0x00000008)
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_OFFLINE (0x00000010)
-#define MPI_RAIDVOLPAGE2_PHYS_DISK_NOT_RESPONDING (0x00000020)
-
-typedef struct _RAIDVOL2_EM_PHYSICAL_DISK
-{
- RAIDVOL2_EM_PHYS_ID Id;
- RAIDVOL2_EM_DISK_INFO Info;
-} RAIDVOL2_EM_PHYSICAL_DISK, MPI_POINTER PTR_RAIDVOL2_EM_PHYSICAL_DISK,
- RaidVol2EmPhysicalDisk_t, MPI_POINTER pRaidVol2EmPhysicalDisk_t;
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 IocNumber; /* 02h */
+ U8 PhysDiskNumber; /* 03h */
+ U8 Reserved[8]; /* 04h */
+ U8 PhysicalDiskIdentifier[16]; /* 0Ch */
+ U8 VendorId[8]; /* 1Ch */
+ U8 ProductId[16]; /* 24h */
+ U8 ProductRevLevel[4]; /* 34h */
+ U32 Reserved1; /* 38h */
+ U8 Info[32]; /* 3Ch */
+} RAIDVOL2_IM_PHYS_ID, MPI_POINTER PTR_RAIDVOL2_IM_PHYS_ID,
+ RaidVol2ImPhysicalID_t, MPI_POINTER pRaidVol2ImPhysicalID_t;
+
+typedef struct _RAIDVOL2_IM_DISK_INFO
+{
+ U32 DiskStatus; /* 00h */
+ U32 DeviceSettings; /* 04h */
+ U16 ErrorCount; /* 08h */
+ U16 Reserved; /* 0Ah */
+ U8 ErrorCdbByte; /* 0Ch */
+ U8 ErrorSenseKey; /* 0Dh */
+ U8 ErrorASC; /* 0Eh */
+ U8 ErrorASCQ; /* 0Fh */
+ U16 SmartCount; /* 10h */
+ U8 SmartASC; /* 12h */
+ U8 SmartASCQ; /* 13h */
+} RAIDVOL2_IM_DISK_INFO, MPI_POINTER PTR_RAIDVOL2_IM_DISK_INFO,
+ RaidVol2ImDiskInfo_t, MPI_POINTER pRaidVol2ImDiskInfo_t;
+
+/* RAID Volume 2 IM Physical Disk DiskStatus flags */
+
+#define MPI_RVP2_PHYS_DISK_PRIMARY (0x00000001)
+#define MPI_RVP2_PHYS_DISK_SECONDARY (0x00000002)
+#define MPI_RVP2_PHYS_DISK_HOT_SPARE (0x00000004)
+#define MPI_RVP2_PHYS_DISK_OUT_OF_SYNC (0x00000008)
+#define MPI_RVP2_PHYS_DISK_STATUS_MASK (0x00000F00)
+#define MPI_RVP2_PHYS_DISK_STATUS_ONLINE (0x00000000)
+#define MPI_RVP2_PHYS_DISK_STATUS_MISSING (0x00000100)
+#define MPI_RVP2_PHYS_DISK_STATUS_NOT_COMPATIBLE (0x00000200)
+#define MPI_RVP2_PHYS_DISK_STATUS_FAILED (0x00000300)
+#define MPI_RVP2_PHYS_DISK_STATUS_INITIALIZING (0x00000400)
+#define MPI_RVP2_PHYS_DISK_STATUS_OFFLINE_REQUESTED (0x00000500)
+#define MPI_RVP2_PHYS_DISK_STATUS_OTHER_OFFLINE (0x00000F00)
+
+
+typedef struct _RAIDVOL2_IM_PHYSICAL_DISK
+{
+ RAIDVOL2_IM_PHYS_ID Id; /* 00h */
+ RAIDVOL2_IM_DISK_INFO Info; /* 5Ch */
+} RAIDVOL2_IM_PHYSICAL_DISK, MPI_POINTER PTR_RAIDVOL2_IM_PHYSICAL_DISK,
+ RaidVol2ImPhysicalDisk_t, MPI_POINTER pRaidVol2ImPhysicalDisk_t;
#define MPI_RAIDVOLPAGE2_MAX_DISKS (3)
typedef struct _CONFIG_PAGE_RAID_VOL_2
{
- fCONFIG_PAGE_HEADER Header;
- U32 VolumeStatus;
- U32 VolumeSettings;
- U32 Reserved;
- U64 MaxLba;
- U32 BlockSize;
- U8 InquirySize;
- U8 NumPhysicalDisks;
- U16 Reserved1;
- U8 InquiryData[56];
- RAIDVOL2_EM_PHYSICAL_DISK EMPhysicalDisk[MPI_RAIDVOLPAGE2_MAX_DISKS];
+ fCONFIG_PAGE_HEADER Header; /* 00h */
+ U32 VolumeStatus; /* 04h */
+ U32 VolumeSettings; /* 08h */
+ U32 Reserved; /* 0Ch */
+ U64 MaxLba; /* 10h */
+ U32 BlockSize; /* 18h */
+ U8 Reserved1; /* 1Ch */
+ U8 NumPhysicalDisks; /* 1Dh */
+ U16 Reserved2; /* 1Eh */
+ RAIDVOL2_IM_PHYSICAL_DISK IMPhysicalDisk[MPI_RAIDVOLPAGE2_MAX_DISKS];
} fCONFIG_PAGE_RAID_VOL_2, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_2,
RaidVolumePage2_t, MPI_POINTER pRaidVolumePage2_t;
@@ -922,6 +1047,7 @@
#define MPI_RAIDVOLPAGE2_SETTING_WRITE_CACHING_ENABLE (0x00000001)
#define MPI_RAIDVOLPAGE2_SETTING_OFFLINE_ON_SMART (0x00000002)
#define MPI_RAIDVOLPAGE2_SETTING_AUTO_CONFIGURE (0x00000004)
+#define MPI_RAIDVOLPAGE2_SETTING_USE_DEFAULTS (0x80000000)
/****************************************************************************/
@@ -930,10 +1056,10 @@
typedef struct _CONFIG_PAGE_LAN_0
{
- ConfigPageHeader_t Header;
- U16 TxRxModes;
- U16 Reserved;
- U32 PacketPrePad;
+ ConfigPageHeader_t Header; /* 00h */
+ U16 TxRxModes; /* 04h */
+ U16 Reserved; /* 06h */
+ U32 PacketPrePad; /* 08h */
} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
LANPage0_t, MPI_POINTER pLANPage0_t;
@@ -945,20 +1071,20 @@
typedef struct _CONFIG_PAGE_LAN_1
{
- ConfigPageHeader_t Header;
- U16 Reserved;
- U8 CurrentDeviceState;
- U8 Reserved1;
- U32 MinPacketSize;
- U32 MaxPacketSize;
- U32 HardwareAddressLow;
- U32 HardwareAddressHigh;
- U32 MaxWireSpeedLow;
- U32 MaxWireSpeedHigh;
- U32 BucketsRemaining;
- U32 MaxReplySize;
- U32 NegWireSpeedHigh;
- U32 NegWireSpeedLow;
+ ConfigPageHeader_t Header; /* 00h */
+ U16 Reserved; /* 04h */
+ U8 CurrentDeviceState; /* 06h */
+ U8 Reserved1; /* 07h */
+ U32 MinPacketSize; /* 08h */
+ U32 MaxPacketSize; /* 0Ch */
+ U32 HardwareAddressLow; /* 10h */
+ U32 HardwareAddressHigh; /* 14h */
+ U32 MaxWireSpeedLow; /* 18h */
+ U32 MaxWireSpeedHigh; /* 1Ch */
+ U32 BucketsRemaining; /* 20h */
+ U32 MaxReplySize; /* 24h */
+ U32 NegWireSpeedHigh; /* 28h */
+ U32 NegWireSpeedLow; /* 2Ch */
} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
LANPage1_t, MPI_POINTER pLANPage1_t;
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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)