patch-2.4.13 linux/include/asm-i386/system.h
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- Lines: 28
- Date:
Tue Oct 23 21:59:05 2001
- Orig file:
v2.4.12/linux/include/asm-i386/system.h
- Orig date:
Thu Oct 18 13:47:37 2001
diff -u --recursive --new-file v2.4.12/linux/include/asm-i386/system.h linux/include/asm-i386/system.h
@@ -281,10 +281,19 @@
* I expect future Intel CPU's to have a weaker ordering,
* but I'd also expect them to finally get their act together
* and add some real memory barriers if so.
+ *
+ * Some non intel clones support out of order store. wmb() ceases to be a
+ * nop for these.
*/
+
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#define rmb() mb()
+
+#ifdef CONFIG_X86_OOSTORE
+#define wmb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
+#else
#define wmb() __asm__ __volatile__ ("": : :"memory")
+#endif
#ifdef CONFIG_SMP
#define smp_mb() mb()
@@ -339,5 +348,7 @@
#define HAVE_DISABLE_HLT
void disable_hlt(void);
void enable_hlt(void);
+
+extern int is_sony_vaio_laptop;
#endif
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