patch-2.4.20 linux-2.4.20/arch/mips64/mm/pg-sb1.c
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- Lines: 93
- Date:
Thu Nov 28 15:53:10 2002
- Orig file:
linux-2.4.19/arch/mips64/mm/pg-sb1.c
- Orig date:
Fri Aug 2 17:39:43 2002
diff -urN linux-2.4.19/arch/mips64/mm/pg-sb1.c linux-2.4.20/arch/mips64/mm/pg-sb1.c
@@ -2,7 +2,7 @@
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
* Copyright (C) 2000 Sibyte
- *
+ *
* Written by Justin Carlson (carlson@sibyte.com)
*
*
@@ -15,11 +15,11 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
+ *
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
+ */
#include <linux/config.h>
#include <asm/page.h>
@@ -40,7 +40,7 @@
* performance model
*
* We prefetch 4 lines ahead. We're also "cheating" slightly here...
- * since we know we're on an SB1, we force the assembler to take
+ * since we know we're on an SB1, we force the assembler to take
* 64-bit operands to speed things up
*/
__asm__ __volatile__(
@@ -50,9 +50,9 @@
".set mips4 \n"
" daddiu $1, %0, %2 \n" /* Calculate the end of the page to clear */
" pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 4 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%0) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%0) \n"
"1: sd $0, 0(%0) \n" /* Throw out a cacheline of 0's */
" sd $0, 8(%0) \n"
" sd $0, 16(%0) \n"
@@ -72,7 +72,7 @@
/*
* This should be optimized in assembly...can't use ld/sd, though,
* because the top 32 bits could be nuked if we took an interrupt
- * during the routine. And this is not a good place to be cli()'ing
+ * during the routine. And this is not a good place to be cli()'ing
*
* The pref's used here are using "streaming" hints, which cause the
* copied data to be kicked out of the cache sooner. A page copy often
@@ -88,11 +88,11 @@
".set mips4 \n"
" daddiu $1, %0, %4 \n" /* Calculate the end of the page to copy */
" pref " SB1_PREF_LOAD_STREAMED_HINT ", 0(%0) \n" /* Prefetch the first 3 lines */
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%1) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 0(%1) \n"
" pref " SB1_PREF_LOAD_STREAMED_HINT ", 32(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%1) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 32(%1) \n"
" pref " SB1_PREF_LOAD_STREAMED_HINT ", 64(%0) \n"
- " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%1) \n"
+ " pref " SB1_PREF_STORE_STREAMED_HINT ", 64(%1) \n"
"1: lw $2, 0(%0) \n" /* Block copy a cacheline */
" lw $3, 4(%0) \n"
" lw $4, 8(%0) \n"
@@ -103,20 +103,20 @@
" lw $9, 28(%0) \n"
" pref " SB1_PREF_LOAD_STREAMED_HINT ", 96(%0) \n" /* Prefetch ahead */
" pref " SB1_PREF_STORE_STREAMED_HINT ", 96(%1) \n"
- " sw $2, 0(%1) \n"
+ " sw $2, 0(%1) \n"
" sw $3, 4(%1) \n"
" sw $4, 8(%1) \n"
" sw $5, 12(%1) \n"
" sw $6, 16(%1) \n"
" sw $7, 20(%1) \n"
" sw $8, 24(%1) \n"
- " sw $9, 28(%1) \n"
+ " sw $9, 28(%1) \n"
" daddiu %1, %1, 32 \n" /* Next cacheline */
" nop \n" /* Force next add to short pipe */
" nop \n" /* Force next add to short pipe */
" bne $1, %0, 1b \n"
" daddiu %0, %0, 32 \n" /* Next cacheline */
- ".set pop \n"
+ ".set pop \n"
: "=r" (to), "=r" (from)
: "0" (from), "1" (to), "I" (PAGE_SIZE-32)
: "$2","$3","$4","$5","$6","$7","$8","$9","memory");
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