patch-2.4.20 linux-2.4.20/arch/mips/sibyte/sb1250/irq_handler.S
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- Lines: 98
- Date:
Thu Nov 28 15:53:10 2002
- Orig file:
linux-2.4.19/arch/mips/sibyte/sb1250/irq_handler.S
- Orig date:
Fri Aug 2 17:39:43 2002
diff -urN linux-2.4.19/arch/mips/sibyte/sb1250/irq_handler.S linux-2.4.20/arch/mips/sibyte/sb1250/irq_handler.S
@@ -10,12 +10,12 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
+ *
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-
+
/*
* sb1250_handle_int() is the routine that is actually called when an interrupt
* occurs. It is installed as the exception vector handler in init_IRQ() in
@@ -23,10 +23,10 @@
*
* In the handle we figure out which interrupts need handling, and use that to
* call the dispatcher, which will take care of actually calling registered
- * handlers
- *
+ * handlers
+ *
* Note that we take care of all raised interrupts in one go at the handler.
- * This is more BSDish than the Indy code, and also, IMHO, more sane.
+ * This is more BSDish than the Indy code, and also, IMHO, more sane.
*/
#include <linux/config.h>
@@ -40,15 +40,15 @@
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
-/*
+/*
* What a pain. We have to be really careful saving the upper 32 bits of any
- * register across function calls if we don't want them trashed--since were
+ * register across function calls if we don't want them trashed--since were
* running in -o32, the calling routing never saves the full 64 bits of a
* register across a function call. Being the interrupt handler, we're
* guaranteed that interrupts are disabled during this code so we don't have
* to worry about random interrupts blasting the high 32 bits.
*/
-
+
.text
.set push
.set noreorder
@@ -77,8 +77,13 @@
mfc0 a0, CP0_EPC
jal sbprof_cpu_intr
addu a0, a0, t1 /* a0 = EPC + (BD ? 4 : 0) */
+ /* Re-enable interrupts here so that events due to sbprof_cpu_intr
+ get charged to ret_from_irq (via a recursive interrupt)
+ rather than the restart pc. */
+ mfc0 t0, CP0_STATUS
+ or t0, ST0_IE
j ret_from_irq
- nop # delay slot
+ mtc0 t0, CP0_STATUS # delay slot
0:
#endif
/* Timer interrupt is routed to IP[4] */
@@ -97,12 +102,24 @@
beqz t1, 2f
nop
jal sb1250_mailbox_interrupt
- move a0, sp
+ move a0, sp
j ret_from_irq
nop # delay slot
2:
#endif
+#ifdef CONFIG_REMOTE_DEBUG
+ /* KGDB (uart 1) interrupt is routed to IP[6] */
+ andi t1, s0, CAUSEF_IP6
+ beqz t1, 1f
+ nop # delay slot
+ jal sb1250_kgdb_interrupt
+ move a0, sp
+ j ret_from_irq
+ nop # delay slot
+1:
+#endif
+
and t1, s0, CAUSEF_IP2
beqz t1, 4f
nop
@@ -120,7 +137,7 @@
3: #dclz s1, s0 /* Find the next interrupt */
.word 0x72118824 # dclz s1, s0
dsubu a0, zero, s1
- daddiu a0, a0, 63
+ daddiu a0, a0, 63
jal do_IRQ
nop
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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)