patch-2.4.20 linux-2.4.20/arch/parisc/kernel/irq.c
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- Lines: 980
- Date:
Thu Nov 28 15:53:10 2002
- Orig file:
linux-2.4.19/arch/parisc/kernel/irq.c
- Orig date:
Fri Feb 9 11:29:44 2001
diff -urN linux-2.4.19/arch/parisc/kernel/irq.c linux-2.4.20/arch/parisc/kernel/irq.c
@@ -1,13 +1,10 @@
-/* $Id: irq.c,v 1.8 2000/02/08 02:01:17 grundler Exp $
- *
+/*
* Code to handle x86 style IRQs plus some generic interrupt stuff.
*
- * This is not in any way SMP-clean.
- *
* Copyright (C) 1992 Linus Torvalds
* Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
- * Copyright (C) 1999 SuSE GmbH (Author: Philipp Rumpf, prumpf@tux.org)
- * Copyright (C) 2000 Hewlett Packard Corp (Co-Author: Grant Grundler, grundler@cup.hp.com)
+ * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
+ * Copyright (C) 1999-2000 Grant Grundler
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -23,138 +20,178 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/bitops.h>
#include <asm/bitops.h>
+#include <linux/config.h>
#include <asm/pdc.h>
#include <linux/errno.h>
#include <linux/init.h>
-#include <linux/kernel_stat.h>
#include <linux/signal.h>
-#include <linux/sched.h>
#include <linux/types.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
+#include <linux/sched.h>
#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
#include <linux/irq.h>
+#include <linux/spinlock.h>
#include <asm/cache.h>
#undef DEBUG_IRQ
+#undef PARISC_IRQ_CR16_COUNTS
extern void timer_interrupt(int, void *, struct pt_regs *);
extern void ipi_interrupt(int, void *, struct pt_regs *);
#ifdef DEBUG_IRQ
-#define DBG_IRQ(x...) printk(x)
+#define DBG_IRQ(irq, x) if ((irq) != TIMER_IRQ) printk x
#else /* DEBUG_IRQ */
-#define DBG_IRQ(x...)
+#define DBG_IRQ(irq, x) do { } while (0)
#endif /* DEBUG_IRQ */
-#define EIEM_MASK(irq) (1L<<(MAX_CPU_IRQ-IRQ_OFFSET(irq)))
-#define CLEAR_EIEM_BIT(irq) set_eiem(get_eiem() & ~EIEM_MASK(irq))
-#define SET_EIEM_BIT(irq) set_eiem(get_eiem() | EIEM_MASK(irq))
+#define EIEM_MASK(irq) (1UL<<(MAX_CPU_IRQ-IRQ_OFFSET(irq)))
+
+/* Bits in EIEM correlate with cpu_irq_action[].
+** Numbered *Big Endian*! (ie bit 0 is MSB)
+*/
+static unsigned long cpu_eiem = 0;
+
+static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; /* protect IRQ regions */
-static void disable_cpu_irq(void *unused, int irq)
+#ifdef CONFIG_SMP
+static void cpu_set_eiem(void *info)
{
- CLEAR_EIEM_BIT(irq);
+ set_eiem((unsigned long) info);
+}
+#endif
+
+static inline void disable_cpu_irq(void *unused, int irq)
+{
+ unsigned long eirr_bit = EIEM_MASK(irq);
+
+ cpu_eiem &= ~eirr_bit;
+ set_eiem(cpu_eiem);
+ smp_call_function(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
}
static void enable_cpu_irq(void *unused, int irq)
{
- unsigned long mask = EIEM_MASK(irq);
+ unsigned long eirr_bit = EIEM_MASK(irq);
- mtctl(mask, 23);
- SET_EIEM_BIT(irq);
+ mtctl(eirr_bit, 23); /* clear EIRR bit before unmasking */
+ cpu_eiem |= eirr_bit;
+ smp_call_function(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
+ set_eiem(cpu_eiem);
+}
+
+/* mask and disable are the same at the CPU level
+** Difference is enable clears pending interrupts
+*/
+#define mask_cpu_irq disable_cpu_irq
+
+static inline void unmask_cpu_irq(void *unused, int irq)
+{
+ unsigned long eirr_bit = EIEM_MASK(irq);
+ cpu_eiem |= eirr_bit;
+ /* NOTE: sending an IPI will cause do_cpu_irq_mask() to
+ ** handle *any* unmasked pending interrupts.
+ ** ie We don't need to check for pending interrupts here.
+ */
+ smp_call_function(cpu_set_eiem, (void *) cpu_eiem, 1, 1);
+ set_eiem(cpu_eiem);
}
-static struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
- [IRQ_OFFSET(TIMER_IRQ)] { timer_interrupt, 0, 0, "timer", NULL, NULL },
- [IRQ_OFFSET(IPI_IRQ)] { ipi_interrupt, 0, 0, "IPI", NULL, NULL },
+/*
+ * XXX cpu_irq_actions[] will become 2 dimensional for per CPU EIR support.
+ * correspond changes needed in:
+ * processor_probe() initialize additional action arrays
+ * request_irq() handle CPU IRQ region specially
+ * do_cpu_irq_mask() index into the matching irq_action array.
+ */
+struct irqaction cpu_irq_actions[IRQ_PER_REGION] = {
+ [IRQ_OFFSET(TIMER_IRQ)] { handler: timer_interrupt, name: "timer", },
+#ifdef CONFIG_SMP
+ [IRQ_OFFSET(IPI_IRQ)] { handler: ipi_interrupt, name: "IPI", },
+#endif
};
-struct irq_region cpu_irq_region = {
- { disable_cpu_irq, enable_cpu_irq, NULL, NULL },
- { &cpu_data[0], "PA-PIC", IRQ_REG_MASK|IRQ_REG_DIS, IRQ_FROM_REGION(CPU_IRQ_REGION)},
- cpu_irq_actions
+struct irq_region_ops cpu_irq_ops = {
+ disable_cpu_irq, enable_cpu_irq, unmask_cpu_irq, unmask_cpu_irq
};
-struct irq_region *irq_region[NR_IRQ_REGS] = {
- [ 0 ] NULL, /* abuse will data page fault (aka code 15) */
- [ CPU_IRQ_REGION ] &cpu_irq_region,
+struct irq_region cpu0_irq_region = {
+ ops: { disable_cpu_irq, enable_cpu_irq, unmask_cpu_irq, unmask_cpu_irq },
+ data: { dev: &cpu_data[0],
+ name: "PARISC-CPU",
+ irqbase: IRQ_FROM_REGION(CPU_IRQ_REGION), },
+ action: cpu_irq_actions,
};
+struct irq_region *irq_region[NR_IRQ_REGS] = {
+ [ 0 ] NULL, /* reserved for EISA, else causes data page fault (aka code 15) */
+ [ CPU_IRQ_REGION ] &cpu0_irq_region,
+};
-/* we special-case the real IRQs here, which feels right given the relatively
- * high cost of indirect calls. If anyone is bored enough to benchmark this
- * and find out whether I am right, feel free to. prumpf */
+/*
+** Generic interfaces that device drivers can use:
+** mask_irq() block IRQ
+** unmask_irq() re-enable IRQ and trigger if IRQ is pending
+** disable_irq() block IRQ
+** enable_irq() clear pending and re-enable IRQ
+*/
-static inline void mask_irq(int irq)
+void mask_irq(int irq)
{
struct irq_region *region;
-
-#ifdef DEBUG_IRQ
- if (irq != TIMER_IRQ)
-#endif
- DBG_IRQ("mask_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
- if(IRQ_REGION(irq) != CPU_IRQ_REGION) {
- region = irq_region[IRQ_REGION(irq)];
- if(region->data.flags & IRQ_REG_MASK)
- region->ops.mask_irq(region->data.dev, IRQ_OFFSET(irq));
- } else {
- CLEAR_EIEM_BIT(irq);
- }
+ DBG_IRQ(irq, ("mask_irq(%d) %d+%d eiem 0x%lx\n", irq,
+ IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
+ irq = irq_cannonicalize(irq);
+ region = irq_region[IRQ_REGION(irq)];
+ if (region->ops.mask_irq)
+ region->ops.mask_irq(region->data.dev, IRQ_OFFSET(irq));
}
-static inline void unmask_irq(int irq)
+void unmask_irq(int irq)
{
struct irq_region *region;
-#ifdef DEBUG_IRQ
- if (irq != TIMER_IRQ)
-#endif
- DBG_IRQ("unmask_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
-
- if(IRQ_REGION(irq) != CPU_IRQ_REGION) {
- region = irq_region[IRQ_REGION(irq)];
- if(region->data.flags & IRQ_REG_MASK)
- region->ops.unmask_irq(region->data.dev, IRQ_OFFSET(irq));
- } else {
- SET_EIEM_BIT(irq);
- }
+ DBG_IRQ(irq, ("unmask_irq(%d) %d+%d eiem 0x%lx\n", irq,
+ IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
+ irq = irq_cannonicalize(irq);
+ region = irq_region[IRQ_REGION(irq)];
+ if (region->ops.unmask_irq)
+ region->ops.unmask_irq(region->data.dev, IRQ_OFFSET(irq));
}
void disable_irq(int irq)
{
struct irq_region *region;
-#ifdef DEBUG_IRQ
- if (irq != TIMER_IRQ)
-#endif
- DBG_IRQ("disable_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
+ DBG_IRQ(irq, ("disable_irq(%d) %d+%d eiem 0x%lx\n", irq,
+ IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
+ irq = irq_cannonicalize(irq);
region = irq_region[IRQ_REGION(irq)];
-
- if(region->data.flags & IRQ_REG_DIS)
+ if (region->ops.disable_irq)
region->ops.disable_irq(region->data.dev, IRQ_OFFSET(irq));
else
BUG();
}
-void enable_irq(int irq)
+void enable_irq(int irq)
{
struct irq_region *region;
-#ifdef DEBUG_IRQ
- if (irq != TIMER_IRQ)
-#endif
- DBG_IRQ("enable_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
+ DBG_IRQ(irq, ("enable_irq(%d) %d+%d eiem 0x%lx\n", irq,
+ IRQ_REGION(irq), IRQ_OFFSET(irq), cpu_eiem));
+ irq = irq_cannonicalize(irq);
region = irq_region[IRQ_REGION(irq)];
- if(region->data.flags & IRQ_REG_DIS)
+ if (region->ops.enable_irq)
region->ops.enable_irq(region->data.dev, IRQ_OFFSET(irq));
else
BUG();
@@ -164,62 +201,92 @@
{
#ifdef CONFIG_PROC_FS
char *p = buf;
- int i, j;
- int regnr, irq_no;
- struct irq_region *region;
- struct irqaction *action, *mainaction;
+ unsigned int regnr;
+
+ p += sprintf(p, " ");
+#ifdef CONFIG_SMP
+ for (regnr = 0; regnr < smp_num_cpus; regnr++)
+#endif
+ p += sprintf(p, " CPU%02d ", regnr);
- p += sprintf(p, " ");
- for (j=0; j<smp_num_cpus; j++)
- p += sprintf(p, "CPU%d ",j);
+
+#ifdef PARISC_IRQ_CR16_COUNTS
+ p += sprintf(p, "[min/avg/max] (CPU cycle counts)");
+#endif
*p++ = '\n';
+ /* We don't need *irqsave lock variants since this is
+ ** only allowed to change while in the base context.
+ */
+ spin_lock(&irq_lock);
for (regnr = 0; regnr < NR_IRQ_REGS; regnr++) {
- region = irq_region[regnr];
- if (!region || !region->action)
+ unsigned int i;
+ struct irq_region *region = irq_region[regnr];
+#ifdef CONFIG_SMP
+ unsigned int j;
+#endif
+
+ if (!region || !region->action)
continue;
-
- mainaction = region->action;
for (i = 0; i <= MAX_CPU_IRQ; i++) {
- action = mainaction++;
- if (!action || !action->name)
- continue;
-
- irq_no = IRQ_FROM_REGION(regnr) + i;
-
+ struct irqaction *action = ®ion->action[i];
+ unsigned int irq_no = IRQ_FROM_REGION(regnr) + i;
+
+ if (!action->handler)
+ continue;
+
p += sprintf(p, "%3d: ", irq_no);
#ifndef CONFIG_SMP
p += sprintf(p, "%10u ", kstat_irqs(irq_no));
#else
for (j = 0; j < smp_num_cpus; j++)
- p += sprintf(p, "%10u ",
- kstat.irqs[cpu_logical_map(j)][irq_no]);
+ p += sprintf(p, "%10u ",
+ kstat.irqs[j][regnr][i]);
#endif
- p += sprintf(p, " %14s",
+ p += sprintf(p, " %14s",
region->data.name ? region->data.name : "N/A");
+
+#ifndef PARISC_IRQ_CR16_COUNTS
p += sprintf(p, " %s", action->name);
- for (action=action->next; action; action = action->next)
- p += sprintf(p, ", %s", action->name);
- *p++ = '\n';
- }
- }
+ while ((action = action->next))
+ p += sprintf(p, ", %s", action->name);
+#else
+ for ( ;action; action = action->next) {
+ unsigned int i, avg, min, max;
- p += sprintf(p, "\n");
-#if CONFIG_SMP
- p += sprintf(p, "LOC: ");
- for (j = 0; j < smp_num_cpus; j++)
- p += sprintf(p, "%10u ",
- apic_timer_irqs[cpu_logical_map(j)]);
- p += sprintf(p, "\n");
+ min = max = action->cr16_hist[0];
+
+ for (avg = i = 0; i < PARISC_CR16_HIST_SIZE; i++) {
+ int hist = action->cr16_hist[i];
+
+ if (hist) {
+ avg += hist;
+ } else
+ break;
+
+ if (hist > max) max = hist;
+ if (hist < min) min = hist;
+ }
+
+ avg /= i;
+ p += sprintf(p, " %s[%d/%d/%d]", action->name,
+ min,avg,max);
+ }
#endif
+ *p++ = '\n';
+ }
+ }
+ spin_unlock(&irq_lock);
+
+ p += sprintf(p, "\n");
return p - buf;
#else /* CONFIG_PROC_FS */
- return 0;
+ return 0;
#endif /* CONFIG_PROC_FS */
}
@@ -240,8 +307,8 @@
int irq;
/* never return irq 0 cause that's the interval timer */
- for(irq=1; irq<=MAX_CPU_IRQ; irq++) {
- if(cpu_irq_region.action[irq].handler == NULL) {
+ for (irq = 1; irq <= MAX_CPU_IRQ; irq++) {
+ if (cpu_irq_actions[irq].handler == NULL) {
return (IRQ_FROM_REGION(CPU_IRQ_REGION) + irq);
}
}
@@ -254,9 +321,7 @@
txn_claim_irq(int irq)
{
if (irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)].handler ==NULL)
- {
return irq;
- }
/* unlikely, but be prepared */
return -1;
@@ -265,14 +330,18 @@
unsigned long
txn_alloc_addr(int virt_irq)
{
- struct cpuinfo_parisc *dev = (struct cpuinfo_parisc *) (irq_region[IRQ_REGION(virt_irq)]->data.dev);
+ static int next_cpu = -1;
- if (0==dev) {
- printk(KERN_ERR "txn_alloc_addr(0x%x): CPU IRQ region? dev %p\n",
- virt_irq,dev);
- return(0UL);
- }
- return (dev->txn_addr);
+ next_cpu++; /* assign to "next" CPU we want this bugger on */
+
+ /* validate entry */
+ while ((next_cpu < NR_CPUS) && !cpu_data[next_cpu].txn_addr)
+ next_cpu++;
+
+ if (next_cpu >= NR_CPUS)
+ next_cpu = 0; /* nothing else, assign monarch */
+
+ return cpu_data[next_cpu].txn_addr;
}
@@ -283,7 +352,7 @@
** V-class (EPIC): 6 bits
** N/L-class/A500: 8 bits (iosapic)
** PCI 2.2 MSI: 16 bits (I think)
-** Existing PCI devices: 32-bits (NCR c720/ATM/GigE/HyperFabric)
+** Existing PCI devices: 32-bits (all Symbios SCSI/ATM/HyperFabric)
**
** On the service provider side:
** o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
@@ -308,117 +377,202 @@
panic("Sorry -- didn't allocate valid IRQ for this device\n");
}
- return(IRQ_OFFSET(virt_irq));
+ return (IRQ_OFFSET(virt_irq));
}
-
-/* FIXME: SMP, flags, bottom halves, rest */
void do_irq(struct irqaction *action, int irq, struct pt_regs * regs)
{
int cpu = smp_processor_id();
irq_enter(cpu, irq);
+ ++kstat.irqs[cpu][IRQ_REGION(irq)][IRQ_OFFSET(irq)];
-#ifdef DEBUG_IRQ
- if (irq != TIMER_IRQ)
+ DBG_IRQ(irq, ("do_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq)));
+
+ for (; action; action = action->next) {
+#ifdef PARISC_IRQ_CR16_COUNTS
+ unsigned long cr_start = mfctl(16);
#endif
- DBG_IRQ("do_irq(%d) %d+%d\n", irq, IRQ_REGION(irq), IRQ_OFFSET(irq));
- if (action->handler == NULL)
- printk(KERN_ERR "No handler for interrupt %d !\n", irq);
- for(; action && action->handler; action = action->next) {
+ if (action->handler == NULL) {
+ if (IRQ_REGION(irq) == EISA_IRQ_REGION && irq_region[EISA_IRQ_REGION]) {
+ /* were we called due to autodetecting (E)ISA irqs ? */
+ unsigned int *status;
+ status = &irq_region[EISA_IRQ_REGION]->data.status[IRQ_OFFSET(irq)];
+ if (*status & IRQ_AUTODETECT) {
+ *status &= ~IRQ_WAITING;
+ continue;
+ }
+ }
+ printk(KERN_ERR "IRQ: CPU:%d No handler for IRQ %d !\n", cpu, irq);
+ continue;
+ }
+
action->handler(irq, action->dev_id, regs);
+
+#ifdef PARISC_IRQ_CR16_COUNTS
+ {
+ unsigned long cr_end = mfctl(16);
+ unsigned long tmp = cr_end - cr_start;
+ /* check for roll over */
+ cr_start = (cr_end < cr_start) ? -(tmp) : (tmp);
+ }
+ action->cr16_hist[action->cr16_idx++] = (int) cr_start;
+ action->cr16_idx &= PARISC_CR16_HIST_SIZE - 1;
+#endif
}
-
+
irq_exit(cpu, irq);
+}
+
+
+/* ONLY called from entry.S:intr_extint() */
+void do_cpu_irq_mask(struct pt_regs *regs)
+{
+ unsigned long eirr_val;
+ unsigned int i=3; /* limit time in interrupt context */
+
+ /*
+ * PSW_I or EIEM bits cannot be enabled until after the
+ * interrupts are processed.
+ * timer_interrupt() assumes it won't get interrupted when it
+ * holds the xtime_lock...an unmasked interrupt source could
+ * interrupt and deadlock by trying to grab xtime_lock too.
+ * Keeping PSW_I and EIEM disabled avoids this.
+ */
+ set_eiem(0UL); /* disable all extr interrupt for now */
+
+ /* 1) only process IRQs that are enabled/unmasked (cpu_eiem)
+ * 2) We loop here on EIRR contents in order to avoid
+ * nested interrupts or having to take another interupt
+ * when we could have just handled it right away.
+ * 3) Limit the number of times we loop to make sure other
+ * processing can occur.
+ */
+ while ((eirr_val = (mfctl(23) & cpu_eiem)) && --i) {
+ unsigned long bit = (1UL<<MAX_CPU_IRQ);
+ unsigned int irq;
+
+ mtctl(eirr_val, 23); /* reset bits we are going to process */
- /* don't need to care about unmasking and stuff */
- do_softirq();
+#ifdef DEBUG_IRQ
+ if (eirr_val != (1UL << MAX_CPU_IRQ))
+ printk(KERN_DEBUG "do_cpu_irq_mask %x\n", eirr_val);
+#endif
+
+ for (irq = 0; eirr_val && bit; bit>>=1, irq++)
+ {
+ if (!(bit&eirr_val))
+ continue;
+
+ /* clear bit in mask - can exit loop sooner */
+ eirr_val &= ~bit;
+
+ do_irq(&cpu_irq_actions[irq], TIMER_IRQ+irq, regs);
+ }
+ }
+ set_eiem(cpu_eiem);
}
+
+/* Called from second level IRQ regions: eg dino or iosapic. */
void do_irq_mask(unsigned long mask, struct irq_region *region, struct pt_regs *regs)
{
unsigned long bit;
- int irq;
- int cpu = smp_processor_id();
+ unsigned int irq;
#ifdef DEBUG_IRQ
- if (mask != (1L << MAX_CPU_IRQ))
- printk("do_irq_mask %08lx %p %p\n", mask, region, regs);
+ if (mask != (1L<<MAX_CPU_IRQ))
+ printk(KERN_DEBUG "do_irq_mask %08lx %p %p\n", mask, region, regs);
#endif
- for(bit=(1L<<MAX_CPU_IRQ), irq = 0; mask && bit; bit>>=1, irq++) {
- int irq_num;
- if(!(bit&mask))
+ for (bit = (1L<<MAX_CPU_IRQ), irq = 0; mask && bit; bit>>=1, irq++) {
+ unsigned int irq_num;
+ if (!(bit&mask))
continue;
+ mask &= ~bit; /* clear bit in mask - can exit loop sooner */
irq_num = region->data.irqbase + irq;
- ++kstat.irqs[cpu][IRQ_FROM_REGION(CPU_IRQ_REGION) | irq];
- if (IRQ_REGION(irq_num) != CPU_IRQ_REGION)
- ++kstat.irqs[cpu][irq_num];
-
mask_irq(irq_num);
do_irq(®ion->action[irq], irq_num, regs);
unmask_irq(irq_num);
}
}
-static inline int alloc_irqregion(void)
+
+static inline int find_free_region(void)
{
int irqreg;
- for(irqreg=1; irqreg<=(NR_IRQ_REGS); irqreg++) {
- if(irq_region[irqreg] == NULL)
+ for (irqreg=1; irqreg <= (NR_IRQ_REGS); irqreg++) {
+ if (irq_region[irqreg] == NULL)
return irqreg;
}
return 0;
}
-struct irq_region *alloc_irq_region(
- int count, struct irq_region_ops *ops, unsigned long flags,
- const char *name, void *dev)
+
+/*****
+ * alloc_irq_region - allocate/init a new IRQ region
+ * @count: number of IRQs in this region.
+ * @ops: function table with request/release/mask/unmask/etc.. entries.
+ * @name: name of region owner for /proc/interrupts output.
+ * @dev: private data to associate with the new IRQ region.
+ *
+ * Every IRQ must become a MMIO write to the CPU's EIRR in
+ * order to get CPU service. The IRQ region represents the
+ * number of unique events the region handler can (or must)
+ * identify. For PARISC CPU, that's the width of the EIR Register.
+ * IRQ regions virtualize IRQs (eg EISA or PCI host bus controllers)
+ * for line based devices.
+ */
+struct irq_region *alloc_irq_region( int count, struct irq_region_ops *ops,
+ const char *name, void *dev)
{
struct irq_region *region;
int index;
- index = alloc_irqregion();
+ index = find_free_region();
+ if (index == 0) {
+ printk(KERN_ERR "Maximum number of irq regions exceeded. Increase NR_IRQ_REGS!\n");
+ return NULL;
+ }
- if((IRQ_REGION(count-1)))
+ if ((IRQ_REGION(count-1)))
return NULL;
-
+
if (count < IRQ_PER_REGION) {
- DBG_IRQ("alloc_irq_region() using minimum of %d irq lines for %s (%d)\n",
- IRQ_PER_REGION, name, count);
+ DBG_IRQ(0, ("alloc_irq_region() using minimum of %d irq lines for %s (%d)\n",
+ IRQ_PER_REGION, name, count));
count = IRQ_PER_REGION;
}
- if(flags & IRQ_REG_MASK)
- if(!(ops->mask_irq && ops->unmask_irq))
- return NULL;
-
- if(flags & IRQ_REG_DIS)
- if(!(ops->disable_irq && ops->enable_irq))
+ /* if either mask *or* unmask is set, both have to be set. */
+ if((ops->mask_irq || ops->unmask_irq) &&
+ !(ops->mask_irq && ops->unmask_irq))
return NULL;
- if((irq_region[index]))
- return NULL;
+ /* ditto for enable/disable */
+ if( (ops->disable_irq || ops->enable_irq) &&
+ !(ops->disable_irq && ops->enable_irq) )
+ return NULL;
- region = kmalloc(sizeof *region, GFP_ATOMIC);
- if(!region)
+ region = kmalloc(sizeof(*region), GFP_ATOMIC);
+ if (!region)
return NULL;
+ memset(region, 0, sizeof(*region));
- region->action = kmalloc(sizeof *region->action * count, GFP_ATOMIC);
- if(!region->action) {
+ region->action = kmalloc(count * sizeof(*region->action), GFP_ATOMIC);
+ if (!region->action) {
kfree(region);
return NULL;
}
- memset(region->action, 0, sizeof *region->action * count);
+ memset(region->action, 0, count * sizeof(*region->action));
region->ops = *ops;
region->data.irqbase = IRQ_FROM_REGION(index);
- region->data.flags = flags;
region->data.name = name;
region->data.dev = dev;
@@ -426,14 +580,12 @@
return irq_region[index];
}
-
-
/* FIXME: SMP, flags, bottom halves, rest */
-int request_irq(unsigned int irq,
+int request_irq(unsigned int irq,
void (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags,
+ unsigned long irqflags,
const char * devname,
void *dev_id)
{
@@ -442,13 +594,19 @@
#if 0
printk(KERN_INFO "request_irq(%d, %p, 0x%lx, %s, %p)\n",irq, handler, irqflags, devname, dev_id);
#endif
- if(!handler) {
+
+ irq = irq_cannonicalize(irq);
+ /* request_irq()/free_irq() may not be called from interrupt context. */
+ if (in_interrupt())
+ BUG();
+
+ if (!handler) {
printk(KERN_ERR "request_irq(%d,...): Augh! No handler for irq!\n",
irq);
return -EINVAL;
}
- if ((IRQ_REGION(irq) == 0) || irq_region[IRQ_REGION(irq)] == NULL) {
+ if (irq_region[IRQ_REGION(irq)] == NULL) {
/*
** Bug catcher for drivers which use "char" or u8 for
** the IRQ number. They lose the region number which
@@ -459,19 +617,24 @@
return -EINVAL;
}
- action = &irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)];
+ spin_lock(&irq_lock);
+ action = &(irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)]);
- if(action->handler) {
- while(action->next)
+ /* First one is preallocated. */
+ if (action->handler) {
+ /* But it's in use...find the tail and allocate a new one */
+ while (action->next)
action = action->next;
- action->next = kmalloc(sizeof *action, GFP_ATOMIC);
+ action->next = kmalloc(sizeof(*action), GFP_ATOMIC);
+ memset(action->next, 0, sizeof(*action));
action = action->next;
- }
+ }
- if(!action) {
- printk(KERN_ERR "request_irq():Augh! No action!\n") ;
+ if (!action) {
+ spin_unlock(&irq_lock);
+ printk(KERN_ERR "request_irq(): Augh! No action!\n") ;
return -ENOMEM;
}
@@ -481,6 +644,7 @@
action->name = devname;
action->next = NULL;
action->dev_id = dev_id;
+ spin_unlock(&irq_lock);
enable_irq(irq);
return 0;
@@ -490,14 +654,22 @@
{
struct irqaction *action, **p;
+ /* See comments in request_irq() about interrupt context */
+ irq = irq_cannonicalize(irq);
+
+ if (in_interrupt()) BUG();
+
+ spin_lock(&irq_lock);
action = &irq_region[IRQ_REGION(irq)]->action[IRQ_OFFSET(irq)];
- if(action->dev_id == dev_id) {
- if(action->next == NULL)
+ if (action->dev_id == dev_id) {
+ if (action->next == NULL) {
action->handler = NULL;
- else
- memcpy(action, action->next, sizeof *action);
+ } else {
+ memcpy(action, action->next, sizeof(*action));
+ }
+ spin_unlock(&irq_lock);
return;
}
@@ -512,27 +684,175 @@
*p = action->next;
kfree(action);
+ spin_unlock(&irq_lock);
return;
}
+ spin_unlock(&irq_lock);
printk(KERN_ERR "Trying to free free IRQ%d\n",irq);
}
-unsigned long probe_irq_on (void)
+
+/*
+ * IRQ autodetection code..
+ *
+ * This depends on the fact that any interrupt that
+ * comes in on to an unassigned handler will get stuck
+ * with "IRQ_WAITING" cleared and the interrupt
+ * disabled.
+ */
+
+static DECLARE_MUTEX(probe_sem);
+
+/**
+ * probe_irq_on - begin an interrupt autodetect
+ *
+ * Commence probing for an interrupt. The interrupts are scanned
+ * and a mask of potential interrupt lines is returned.
+ *
+ */
+
+/* TODO: spin_lock_irq(desc->lock -> irq_lock) */
+
+unsigned long probe_irq_on(void)
{
- return 0;
+ unsigned int i;
+ unsigned long val;
+ unsigned long delay;
+ struct irq_region *region;
+
+ /* support for irq autoprobing is limited to EISA (irq region 0) */
+ region = irq_region[EISA_IRQ_REGION];
+ if (!EISA_bus || !region)
+ return 0;
+
+ down(&probe_sem);
+
+ /*
+ * enable any unassigned irqs
+ * (we must startup again here because if a longstanding irq
+ * happened in the previous stage, it may have masked itself)
+ */
+ for (i = EISA_MAX_IRQS-1; i > 0; i--) {
+ struct irqaction *action;
+
+ spin_lock_irq(&irq_lock);
+ action = region->action + i;
+ if (!action->handler) {
+ region->data.status[i] |= IRQ_AUTODETECT | IRQ_WAITING;
+ region->ops.enable_irq(region->data.dev,i);
+ }
+ spin_unlock_irq(&irq_lock);
+ }
+
+ /*
+ * Wait for spurious interrupts to trigger
+ */
+ for (delay = jiffies + HZ/10; time_after(delay, jiffies); )
+ /* about 100ms delay */ synchronize_irq();
+
+ /*
+ * Now filter out any obviously spurious interrupts
+ */
+ val = 0;
+ for (i = 0; i < EISA_MAX_IRQS; i++) {
+ unsigned int status;
+
+ spin_lock_irq(&irq_lock);
+ status = region->data.status[i];
+
+ if (status & IRQ_AUTODETECT) {
+ /* It triggered already - consider it spurious. */
+ if (!(status & IRQ_WAITING)) {
+ region->data.status[i] = status & ~IRQ_AUTODETECT;
+ region->ops.disable_irq(region->data.dev,i);
+ } else
+ if (i < BITS_PER_LONG)
+ val |= (1 << i);
+ }
+ spin_unlock_irq(&irq_lock);
+ }
+
+ return val;
}
-int probe_irq_off (unsigned long irqs)
+/*
+ * Return the one interrupt that triggered (this can
+ * handle any interrupt source).
+ */
+
+/**
+ * probe_irq_off - end an interrupt autodetect
+ * @val: mask of potential interrupts (unused)
+ *
+ * Scans the unused interrupt lines and returns the line which
+ * appears to have triggered the interrupt. If no interrupt was
+ * found then zero is returned. If more than one interrupt is
+ * found then minus the first candidate is returned to indicate
+ * their is doubt.
+ *
+ * The interrupt probe logic state is returned to its previous
+ * value.
+ *
+ * BUGS: When used in a module (which arguably shouldnt happen)
+ * nothing prevents two IRQ probe callers from overlapping. The
+ * results of this are non-optimal.
+ */
+
+int probe_irq_off(unsigned long val)
{
- return 0;
+ struct irq_region *region;
+ int i, irq_found, nr_irqs;
+
+ /* support for irq autoprobing is limited to EISA (irq region 0) */
+ region = irq_region[EISA_IRQ_REGION];
+ if (!EISA_bus || !region)
+ return 0;
+
+ nr_irqs = 0;
+ irq_found = 0;
+ for (i = 0; i < EISA_MAX_IRQS; i++) {
+ unsigned int status;
+
+ spin_lock_irq(&irq_lock);
+ status = region->data.status[i];
+
+ if (status & IRQ_AUTODETECT) {
+ if (!(status & IRQ_WAITING)) {
+ if (!nr_irqs)
+ irq_found = i;
+ nr_irqs++;
+ }
+ region->ops.disable_irq(region->data.dev,i);
+ region->data.status[i] = status & ~IRQ_AUTODETECT;
+ }
+ spin_unlock_irq(&irq_lock);
+ }
+ up(&probe_sem);
+
+ if (nr_irqs > 1)
+ irq_found = -irq_found;
+ return irq_found;
}
void __init init_IRQ(void)
{
+ local_irq_disable(); /* PARANOID - should already be disabled */
+ mtctl(-1L, 23); /* EIRR : clear all pending external intr */
+#ifdef CONFIG_SMP
+ if (!cpu_eiem)
+ cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
+#else
+ cpu_eiem = EIEM_MASK(TIMER_IRQ);
+#endif
+ set_eiem(cpu_eiem); /* EIEM : enable all external intr */
+
}
-void init_irq_proc(void)
+#ifdef CONFIG_PROC_FS
+/* called from kernel/sysctl.c:sysctl_init() */
+void __init init_irq_proc(void)
{
}
+#endif
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)