patch-2.4.20 linux-2.4.20/include/asm-ppc64/naca.h
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- Lines: 84
- Date:
Thu Nov 28 15:53:15 2002
- Orig file:
linux-2.4.19/include/asm-ppc64/naca.h
- Orig date:
Fri Aug 2 17:39:45 2002
diff -urN linux-2.4.19/include/asm-ppc64/naca.h linux-2.4.20/include/asm-ppc64/naca.h
@@ -13,28 +13,63 @@
#include <asm/types.h>
struct naca_struct {
- void *xItVpdAreas;
- void *xRamDisk;
- u64 xRamDiskSize; /* In pages */
- struct paca_struct *paca; /* Ptr to an array of pacas */
- u64 debug_switch; /* Bits to control debug printing */
- u16 processorCount; /* # of physical processors */
- u16 dCacheL1LineSize; /* Line size of L1 DCache in bytes */
- u16 dCacheL1LogLineSize; /* Log-2 of DCache line size */
- u16 dCacheL1LinesPerPage; /* DCache lines per page */
- u16 iCacheL1LineSize; /* Line size of L1 ICache in bytes */
- u16 iCacheL1LogLineSize; /* Log-2 of ICache line size */
- u16 iCacheL1LinesPerPage; /* ICache lines per page */
- u16 slb_size; /* SLB size in entries */
- u64 physicalMemorySize; /* Size of real memory in bytes */
- u64 pftSize; /* Log base 2 of page table size */
- u64 serialPortAddr; /* Phyical address of serial port */
- u8 interrupt_controller; /* Type of interrupt controller */
- u8 resv0; /* Type of interrupt controller */
- u16 platform; /* Platform flags */
- u8 resv1[12]; /* Padding */
+ /*==================================================================
+ * Cache line 1: 0x0000 - 0x007F
+ * Kernel only data - undefined for user space
+ *==================================================================
+ */
+ void *xItVpdAreas; /* VPD Data 0x00 */
+ void *xRamDisk; /* iSeries ramdisk 0x08 */
+ u64 xRamDiskSize; /* In pages 0x10 */
+ struct paca_struct *paca; /* Ptr to an array of pacas 0x18 */
+ u64 debug_switch; /* Debug print control 0x20 */
+ u64 banner; /* Ptr to banner string 0x28 */
+ u64 log; /* Ptr to log buffer 0x30 */
+ u64 serialPortAddr; /* Phy addr of serial port 0x38 */
+ u64 interrupt_controller; /* Type of int controller 0x40 */
+ u64 slb_size; /* SLB size in entries 0x48 */
+ u64 pftSize; /* Log 2 of page table size 0x50 */
+ u64 resv0[5]; /* Reserved 0x58 - 0x7F */
+
+ /*==================================================================
+ * Cache line 2: 0x0080 - 0x00FF
+ * Kernel / User data
+ *==================================================================
+ */
+ u8 eye_catcher[6]; /* Eyecatcher: PPC64 0x00 */
+ u16 version; /* Version number 0x06 */
+ u16 platform; /* Platform flags 0x08 */
+ u16 processor; /* Processor type 0x0A */
+ u32 processorCount; /* # of physical processors 0x0C */
+ u64 physicalMemorySize; /* Size of real memory(B) 0x10 */
+
+ u16 dCacheL1Size; /* L1 d-cache size 0x18 */
+ u16 dCacheL1LineSize; /* L1 d-cache line size 0x1A */
+ u16 dCacheL1LogLineSize; /* L1 d-cache line size Log2 0x1C */
+ u16 dCacheL1LinesPerPage; /* L1 d-cache lines / page 0x1E */
+ u16 dCacheL1Assoc; /* L1 d-cache associativity 0x20 */
+
+ u16 iCacheL1Size; /* L1 i-cache size 0x22 */
+ u16 iCacheL1LineSize; /* L1 i-cache line size 0x24 */
+ u16 iCacheL1LogLineSize; /* L1 i-cache line size Log2 0x26 */
+ u16 iCacheL1LinesPerPage; /* L1 i-cache lines / page 0x28 */
+ u16 iCacheL1Assoc; /* L1 i-cache associativity 0x2A */
+
+ u16 cacheL2Size; /* L2 cache size 0x2C */
+ u16 cacheL2Assoc; /* L2 cache associativity 0x2E */
+
+ u64 tb_orig_stamp; /* Timebase at boot 0x30 */
+ u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
+ u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */
+ u64 stamp_xsec; /* 0x48 */
+ volatile u64 tb_update_count; /* Timebase atomicity ctr 0x50 */
+ u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */
+ u32 tz_dsttime; /* Type of dst correction 0x5C */
+
+ u64 resv1[4]; /* Reserverd 0x60 - 0x7F */
};
+
extern struct naca_struct *naca;
#endif /* _NACA_H */
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