patch-2.4.22 linux-2.4.22/arch/ppc/kernel/entry.S

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diff -urN linux-2.4.21/arch/ppc/kernel/entry.S linux-2.4.22/arch/ppc/kernel/entry.S
@@ -1,5 +1,5 @@
 /*
- *  PowerPC version 
+ *  PowerPC version
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  *  Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP
  *    Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com>
@@ -16,7 +16,7 @@
  *  modify it under the terms of the GNU General Public License
  *  as published by the Free Software Foundation; either version
  *  2 of the License, or (at your option) any later version.
- *	
+ *
  */
 
 #include <linux/config.h>
@@ -162,7 +162,7 @@
 	blrl			/* Call handler */
 	.globl	ret_from_syscall_2
 ret_from_syscall_2:
-	stw	r3,RESULT(r1)	/* Save result */	
+	stw	r3,RESULT(r1)	/* Save result */
 	li	r10,-_LAST_ERRNO
 	cmpl	0,r3,r10
 	blt	60f
@@ -202,7 +202,7 @@
  *
  * The code which creates the new task context is in 'copy_thread'
  * in arch/ppc/kernel/process.c
- */	
+ */
 _GLOBAL(_switch)
 	stwu	r1,-INT_FRAME_SIZE(r1)
 	stw	r0,GPR0(r1)
@@ -291,7 +291,7 @@
 	bl	do_signal
 	.globl	do_signal_ret
 do_signal_ret:
-	.globl ret_to_user_hook	
+	.globl ret_to_user_hook
 ret_to_user_hook:
 	nop
 restore:
@@ -303,10 +303,13 @@
 	REST_GPR(31,r1)
 
 	/* make sure we hard disable here, even if rtl is active, to protect
-	 * SRR[01] and SPRG2 -- Cort 
+	 * SRR[01] and SPRG2 -- Cort
 	 */
 	mfmsr	r0		/* Get current interrupt state */
 	rlwinm	r0,r0,0,17,15	/* clear MSR_EE in r0 */
+#ifdef CONFIG_4xx
+ 	rlwinm	r0,r0,0,23,21	/* clear MSR_DE in r0 */
+#endif
 	SYNC			/* Some chip revs have problems here... */
 	mtmsr	r0		/* Update machine state */
 
@@ -323,6 +326,14 @@
 	mtspr	SPRN_VRSAVE,r0		/* if G4, restore VRSAVE reg */
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif /* CONFIG_ALTIVEC */
+#if defined(CONFIG_4xx) && !defined(CONFIG_BDI_SWITCH)
+	/* Restore the processor debugging state of the thread.  Only do
+	 * this if we aren't using an Abatron BDI JTAG debugger.  It doesn't
+	 * tolerate others mucking with the debug registers.
+	 */
+	lwz	r0,THREAD+THREAD_DBCR0(r2)
+	mtspr	SPRN_DBCR0,r0
+#endif
 	addi	r0,r1,INT_FRAME_SIZE	/* size of frame */
 	stw	r0,THREAD+KSP(r2)	/* save kernel stack pointer */
 	tophys(r8,r1)
@@ -340,7 +351,7 @@
 	/* We have to "dummy" load from the context save area in case
 	 * these instructions cause an MMU fault.  If this happens
 	 * after we load SRR0/SRR1, our return context is hosed.  -- Dan
-	 * 
+	 *
 	 * This workaround is not enough, we must also make sure the
 	 * actual code for this routine is in the TLB or BAT mapped.
 	 * For 6xx/Power3, we know the code is in a BAT, so this should
@@ -379,7 +390,7 @@
 
 
 /*
- * PROM code for specific machines follows.  Put it 
+ * PROM code for specific machines follows.  Put it
  * here so it's easy to add arch-specific sections later.
  * -- Cort
  */

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