patch-2.4.22 linux-2.4.22/include/asm-ia64/sn/pda.h
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- Lines: 97
- Date:
2003-08-25 04:44:43.000000000 -0700
- Orig file:
linux-2.4.21/include/asm-ia64/sn/pda.h
- Orig date:
2003-06-13 07:51:38.000000000 -0700
diff -urN linux-2.4.21/include/asm-ia64/sn/pda.h linux-2.4.22/include/asm-ia64/sn/pda.h
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
#ifndef _ASM_IA64_SN_PDA_H
#define _ASM_IA64_SN_PDA_H
@@ -13,6 +13,7 @@
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/page.h>
+#include <linux/mmzone.h>
#include <asm/sn/bte.h>
@@ -25,15 +26,6 @@
* all SN per-cpu data structures.
*/
-#ifdef BUS_INT_WAR
-#define POLL_ENTRIES 50
-typedef struct {
- int irq;
- int interval;
- short tick;
-} sn_poll_entry_t;
-#endif
-
typedef struct pda_s {
/* Having a pointer in the begining of PDA tends to increase
@@ -47,31 +39,27 @@
/*
* Support for SN LEDs
*/
-#ifdef CONFIG_IA64_SGI_SN1
- volatile long *led_address;
-#else
volatile short *led_address;
-#endif
u8 led_state;
u8 hb_state; /* supports blinking heartbeat leds */
+ u8 shub_1_1_found;
unsigned int hb_count;
unsigned int idle_flag;
-#ifdef CONFIG_IA64_SGI_SN2
- struct irqpda_s *p_irqpda; /* Pointer to CPU irq data */
-#endif
volatile unsigned long *bedrock_rev_id;
volatile unsigned long *pio_write_status_addr;
volatile unsigned long *pio_shub_war_cam_addr;
volatile unsigned long *mem_write_status_addr;
- bteinfo_t *cpu_bte_if[BTES_PER_NODE]; /* cpu interface order */
+ struct bteinfo_s *cpu_bte_if[BTES_PER_NODE]; /* cpu interface order */
-#ifdef BUS_INT_WAR
- sn_poll_entry_t pda_poll_entries[POLL_ENTRIES];
- int pda_poll_entry_count;
-#endif
+ unsigned long sn_soft_irr[4];
+ unsigned long sn_in_service_ivecs[4];
+ short cnodeid_to_nasid_table[NR_NODES];
+ int sn_lb_int_war_ticks;
+ int sn_last_irq;
+ int sn_first_irq;
} pda_t;
@@ -83,10 +71,10 @@
* the IA64 cpu_data area. A full page is allocated for the cp_data area for each
* cpu but only a small amout of the page is actually used. We put the SNIA PDA
* in the same page as the cpu_data area. Note that there is a check in the setup
- * code to verify that we dont overflow the page.
+ * code to verify that we don't overflow the page.
*
* Seems like we should should cache-line align the pda so that any changes in the
- * size of the cpu_data area dont change cache layout. Should we align to 32, 64, 128
+ * size of the cpu_data area don't change cache layout. Should we align to 32, 64, 128
* or 512 boundary. Each has merits. For now, pick 128 but should be revisited later.
*/
#define CPU_DATA_END CACHE_ALIGN((long)&(((struct cpuinfo_ia64*)0)->platform_specific))
@@ -96,5 +84,10 @@
#define pdacpu(cpu) (*((pda_t *) ((long)cpu_data(cpu) + CPU_DATA_END)))
+/*
+ * Use this macro to test if shub 1.1 wars should be enabled
+ */
+#define enable_shub_wars_1_1() (pda.shub_1_1_found)
+
#endif /* _ASM_IA64_SN_PDA_H */
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