patch-2.4.22 linux-2.4.22/include/asm-mips/processor.h
Next file: linux-2.4.22/include/asm-mips/r4kcache.h
Previous file: linux-2.4.22/include/asm-mips/posix_types.h
Back to the patch index
Back to the overall index
- Lines: 222
- Date:
2003-08-25 04:44:44.000000000 -0700
- Orig file:
linux-2.4.21/include/asm-mips/processor.h
- Orig date:
2003-06-13 07:51:38.000000000 -0700
diff -urN linux-2.4.21/include/asm-mips/processor.h linux-2.4.22/include/asm-mips/processor.h
@@ -4,9 +4,9 @@
* for more details.
*
* Copyright (C) 1994 Waldorf GMBH
- * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001 Ralf Baechle
+ * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
- * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_PROCESSOR_H
#define _ASM_PROCESSOR_H
@@ -16,44 +16,98 @@
#include <asm/isadep.h>
/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
+ * Return current * instruction pointer ("program counter").
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
#ifndef __ASSEMBLY__
+#include <linux/smp.h>
#include <linux/threads.h>
+
#include <asm/cachectl.h>
#include <asm/mipsregs.h>
#include <asm/reg.h>
#include <asm/system.h>
+/*
+ * Descriptor for a cache
+ */
+struct cache_desc {
+ unsigned short linesz; /* Size of line in bytes */
+ unsigned short ways; /* Number of ways */
+ unsigned short sets; /* Number of lines per set */
+ unsigned int waysize; /* Bytes per way */
+ unsigned int waybit; /* Bits to select in a cache set */
+ unsigned int flags; /* Flags describing cache properties */
+};
+
+/*
+ * Flag definitions
+ */
+#define MIPS_CACHE_NOT_PRESENT 0x00000001
+#define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
+#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
+#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
+
struct cpuinfo_mips {
unsigned long udelay_val;
unsigned long *pgd_quick;
unsigned long *pte_quick;
unsigned long pgtable_cache_sz;
unsigned long asid_cache;
-} __attribute__((__aligned__(SMP_CACHE_BYTES)));
+ /*
+ * Capability and feature descriptor structure for MIPS CPU
+ */
+ unsigned long options;
+ unsigned int processor_id;
+ unsigned int fpu_id;
+ unsigned int cputype;
+ int isa_level;
+ int tlbsize;
+ struct cache_desc icache; /* Primary I-cache */
+ struct cache_desc dcache; /* Primary D or combined I/D cache */
+ struct cache_desc scache; /* Secondary cache */
+ struct cache_desc tcache; /* Tertiary/split secondary cache */
+} __attribute__((aligned(SMP_CACHE_BYTES)));
+
+/*
+ * Assumption: Options of CPU 0 are a superset of all processors.
+ * This is true for all known MIPS systems.
+ */
+#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
+#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
+#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB)
+#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
+#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
+#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
+#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
+#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
+#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
+#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
+#define cpu_has_cache_cdex (cpu_data[0].options & MIPS_CPU_CACHE_CDEX)
+#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
+#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
+#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
+#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
+#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
+#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
+#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
+#define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
+#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
+
+extern struct cpuinfo_mips cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+
+extern void cpu_probe(void);
+extern void cpu_report(void);
/*
* System setup and hardware flags..
*/
extern void (*cpu_wait)(void);
-extern void r3081_wait(void);
-extern void r39xx_wait(void);
-extern void r4k_wait(void);
-extern void au1k_wait(void);
-extern struct cpuinfo_mips cpu_data[];
extern unsigned int vced_count, vcei_count;
-#ifdef CONFIG_SMP
-#define current_cpu_data cpu_data[smp_processor_id()]
-#else
-#define current_cpu_data cpu_data[0]
-#endif
-
/*
* Bus types (default is ISA, but people can check others with these..)
*/
@@ -67,21 +121,12 @@
#define MCA_bus__is_a_macro /* for versions in ksyms.c */
/*
- * MIPS has no problems with write protection
- */
-#define wp_works_ok 1
-#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
-
-/* Lazy FPU handling on uni-processor */
-extern struct task_struct *last_task_used_math;
-
-/*
* User space process size: 2GB. This is hardcoded into a few places,
* so don't change it unless you know what you are doing. TASK_SIZE
* for a 64 bit kernel expandable to 8192EB, of which the current MIPS
* implementations will "only" be able to use 1TB ...
*/
-#define TASK_SIZE (0x7fff8000UL)
+#define TASK_SIZE 0x7fff8000UL
/* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
@@ -145,8 +190,8 @@
unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
unsigned long error_code;
unsigned long trap_no;
-#define MF_FIXADE 1 /* Fix address errors in software */
-#define MF_LOGADE 2 /* Log address errors to syslog */
+#define MF_FIXADE 1 /* Fix address errors in software */
+#define MF_LOGADE 2 /* Log address errors to syslog */
unsigned long mflags;
mm_segment_t current_ds;
unsigned long irix_trampoline; /* Wheee... */
@@ -181,7 +226,7 @@
#ifdef __KERNEL__
-#define KERNEL_STACK_SIZE 8192
+#define KERNEL_STACK_SIZE 0x2000
#ifndef __ASSEMBLY__
@@ -194,6 +239,11 @@
#define copy_segments(p, mm) do { } while(0)
#define release_segments(mm) do { } while(0)
+struct mips_frame_info {
+ int frame_offset;
+ int pc_offset;
+};
+extern struct mips_frame_info schedule_frame;
/*
* Return saved PC of a blocked thread.
*/
@@ -205,26 +255,24 @@
if (t->reg31 == (unsigned long) ret_from_fork)
return t->reg31;
- return ((unsigned long *)t->reg29)[13];
+ if (schedule_frame.pc_offset < 0)
+ return 0;
+ return ((unsigned long *)t->reg29)[schedule_frame.pc_offset];
}
/*
* Do necessary setup to start up a newly executed thread.
*/
-#define start_thread(regs, new_pc, new_sp) do { \
- /* New thread loses kernel and FPU privileges. */ \
- regs->cp0_status = (regs->cp0_status & ~(ST0_CU0|ST0_KSU|ST0_CU1)) | KU_USER;\
- regs->cp0_epc = new_pc; \
- regs->regs[29] = new_sp; \
- current->thread.current_ds = USER_DS; \
-} while (0)
+extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
+struct task_struct;
unsigned long get_wchan(struct task_struct *p);
#define __PT_REG(reg) ((long)&((struct pt_regs *)0)->reg - sizeof(struct pt_regs))
#define __KSTK_TOS(tsk) ((unsigned long)(tsk) + KERNEL_STACK_SIZE - 32)
#define KSTK_EIP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_epc)))
#define KSTK_ESP(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(regs[29])))
+#define KSTK_STATUS(tsk) (*(unsigned long *)(__KSTK_TOS(tsk) + __PT_REG(cp0_status)))
/* Allocation and freeing of basic task resources. */
/*
@@ -239,7 +287,7 @@
#define init_task (init_task_union.task)
#define init_stack (init_task_union.stack)
-#define cpu_relax() do { } while (0)
+#define cpu_relax() barrier()
#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)